You can compile an FPGA VI on a computer other than the development computer. You might want to compile on another computer if the development computer is slow or does not have enough memory to compile the VI for the FPGA target.

By default, LabVIEW uses the compile server and compile worker installed on the local computer. The compile server automatically installs with the FPGA Module on the local computer. However, you must install the FPGA Compile Farm Server on any remote computer you want to use as the compile server, and you must install the Xilinx compilation tools on any computer(s) you want to use as a compile worker.

Complete the following steps to configure LabVIEW to compile an FPGA VI on a remote computer.

1. Install the necessary Xilinx compilation tools on the remote computer.
2. Navigate to the FPGA\CompileWorker\ directory and run FPGACompileFarmConfiguration.exe.
3. Place a checkmark in the Allow users to connect remotely to this compile server checkbox and click OK.
4. Navigate to the FPGA\CompileWorker\ directory to launch the compile worker.
   Note   You must launch the compile worker from the computer on which it is executing. You cannot launch the compile worker remotely.
5. Leave the compile worker running on the remote computer.
6. On the local computer, open the FPGA project that contains the FPGA VI you want to compile.
7. Select Tools»Options to display the Options dialog box.
8. Select FPGA Module from the Category list to display the FPGA Module Options dialog box.
9. Select Connect to a compile server in the Compile Server section.
10. Type the name or IP address of the remote computer running the compile server in the Host name text box.
11. (Optional) Type the user name and password necessary to log into the remote compile server. By default, the User name is admin and the Password text box is empty.
12. Click OK.
13. Compile the FPGA VI. If LabVIEW is unable to contact the compile server, LabVIEW displays an error in the Compilation Status window. Otherwise, LabVIEW compiles the FPGA VI on the remote computer every time you compile an FPGA VI.