Introduction to FPGA Applications and Projects

FPGA applications range from a local system with an FPGA target on a development computer running a single FPGA VI to a large embedded system that includes multiple FPGA targets, one or more RT targets, and LabVIEW running on a development computer. You must use LabVIEW project files (.lvproj) to create FPGA applications. Understanding your system architecture helps you use LabVIEW projects to build and manage your FPGA applications.

Understanding Local and Embedded Systems

The structure of your LabVIEW project depends on the components included in your FPGA application. Refer to the following figure to understand the physical layout of local and embedded systems containing an FPGA target.

Understanding the Components of an FPGA Project

Use the Project Explorer window to manage your FPGA project. Each FPGA project varies based on the components of the system architecture. The following figure shows the components of a local system, Local System.lvproj, versus an embedded system, Embedded System.lvproj.

The following table describes the components of an FPGA application and their location in LabVIEW FPGA projects.

Component Description

LabVIEW Project LabVIEW projects allow you to manage VIs and targets as you develop an application on the development computer. A LabVIEW project file includes references to files in the project, configuration information, deployment information, build information, and so on.

My Computer My Computer, also called the development computer, is the computer you use to develop your LabVIEW project. The development computer is a PC that runs a supported version of Windows with LabVIEW and the LabVIEW FPGA Module installed.

RIO Chassis The RIO chassis houses and directly connects the I/O blocks of the FPGA target to the interchangeable I/O modules for high-performance timing, triggering, and synchronization.

Controller The controller directly connects to the RIO chassis and communicates with the development computer either directly or over a network. The controller includes an embedded processor that runs either a real-time operating system (RTOS) or Windows.

FPGA Target The FPGA target is a programmable chip composed of logic blocks, I/O blocks, and programmable interconnects that implement the digital circuit you design with the LabVIEW FPGA Module.

FPGA VI The FPGA VI is the VI that you download and run on the FPGA target. The LabVIEW compilation tools translate the FPGA VI into a circuit schematic to reconfigure the blocks and interconnects on the FPGA target.

Host VI The host VI runs on the controller and communicates programmatically with the FPGA VI. You use the host VI to log data, control the timing of data transfer, and create a system with the FPGA target as a component.

User Interface VI The user interface VI runs on the development computer and communicates with the host VI. The user interface VI allows the user to programmatically interact with the controls and indicators of the host VI. In the absence of a controller, the user interface VI becomes the host VI and communicates with the FPGA VI directly.

I/O I/O refers to the analog and digital inputs and outputs of your FPGA system, such as thermocouples, RTD, bridge sensors, counters, pulse generation, and so on. Refer to your specific hardware documentation for supported I/O.

Clock The clock controls the execution rate of the FPGA VI by specifying the timing objectives of an FPGA system. Operations occur at the rate determined by the dataflow of the VI if you do not include additional code to control the timing. The default clock rate on most FPGA targets is 40 MHz.

Build Specification The build specification for your FPGA target specifies which of the following options LabVIEW creates when you compile your FPGA VI:
  • Simulation Export—Configures and exports project files for third-party simulation.
  • Compilation—Configures and translates project files into a bitfile to download to the FPGA target.
  • Source Distribution—Configures project files for distribution as a stand-alone application.
You must create a build specification before you compile, download, and run the FPGA VI. If you do not create a build specification, LabVIEW automatically creates and specifies a default build specification.