A semiconductor test program must communicate information from the tester instrumentation to the DUT to which the instrumentation is connected. To handle this communication in a test program, test engineers must consider the following requirements for instrument sessions and channels for all resources in the test system:

• Develop test program code that uses the names of actual connections on the DUT (DUT pins) to refer to channels on the instrument.
• Manage a large number of instrument channels.
• Scale test code to test multiple sites in parallel to improve tester efficiency.
• Support multiple types of instruments because different instruments might use channels and sessions in different ways.

Typically, instrument driver software provides test engineers with software tools for communicating with the DUT in terms of the instrument channels and sessions. However, instrument drivers have no information about the actual pins on the DUT. To develop test code that uses DUT pin names, a test engineer must use a pin map to associate each DUT pin name with the name, channel, and session of the instrument connected to that particular DUT pin.

TSM Implementation

Use the Pin Map Editor to view, create, modify, and save pin map files. The pin map XML schema, located at <TestStand>\Components\Schemas\NI_SemiconductorModule\PinMap.xsd, defines the structure for a pin map file. Use the Pin Map File Path control on the Pin Map panel of the Test Program Editor to specify the pin map file to use with the test program.

The pin map file can support multiple test sites and multiple instrument types.

In addition, use the TSM Code Module API to query instrument names, obtain all open sessions, and translate DUT pin names or pin groups to instrument channels and sessions. The Semiconductor Multi Test and the Semiconductor Action steps create the SemiconductorModuleContext object that you can pass to a LabVIEW or .NET code module to use the TSM Code Module API. The SemiconductorModuleContext object describes a subset of pins, relays, sites, and instruments on a test system.