Socketed Component-Level IP (CLIP) by Module Name

The following tables provide the Socketed CLIP signals for your FlexRIO Integrated I/O Module.
Notice You can create custom CLIP items for your FlexRIO Integrated I/O module. If you choose to develop a custom CLIP item for your application, NI recommends using the CLIP provided with in the LabVIEW example for your module as a template, while referring to the specifications for your module to ensure you maintain the proper electrical characteristics. Failure to adhere to the specified electrical requirements and signal directions may result in device damage. NI is not liable for any damage resulting from such misuse.

PXIe-5745 Socketed CLIP Signals

The PXIe-5745 CLIP provides access to two AC-coupled 12-bit 3.2 GS/s analog input channels and eight bidirectional DIO channels.
CLIP Signal NameDirectionData TypeDescription
Data ClockFrom CLIPBooleanFPGA clock used to sample analog input data.
Data Clock 2xFrom CLIPBooleanFPGA clock that samples analog input data at twice the rate of Data Clock.
AO Ready for InputFrom CLIPBooleanIndicates whether the AO link is ready for data.
AO 0 Data NTo CLIPfixed-point <±12,1>Sends analog output samples through the AO 0 front panel connector.
AO 0 Data N-1
AO 0 Data N-2
AO 0 Data N-3
AO 0 Data N-4
AO 0 Data N-5
AO 0 Data N-6
AO 0 Data N-7
AO 0 Data N-8
AO 0 Data N-9
AO 0 Data N-10
AO 0 Data N-11
AO 0 Data N-12
AO 0 Data N-13
AO 0 Data N-14
AO 0 Data N-15
Ao 1 Data NTo CLIPfixed-point <±12,1>Sends analog output samples through the AO 1 front panel connector.
AO 1 Data N-1
AO 1 Data N-2
AO 1 Data N-3
AO 1 Data N-4
AO 1 Data N-5
AO 1 Data N-6
AO 1 Data N-7
AO 1 Data N-8
AO 1 Data N-9
AO 1 Data N-10
AO 1 Data N-11
AO 1 Data N-12
AO 1 Data N-13
AO 1 Data N-14
AO 1 Data N-15
IO Error From CLIPI32Returns IO module errors, to be reported by the driver.
IO Ready From CLIPBooleanIndicates successful configuration of the IO module devices with the current clocking mode settings.

PXIe-5785 Socketed CLIP Signals

The PXIe-5785 CLIP provides access to two AC-coupled 12-bit 3.2 GS/s analog input channels, two AC-coupled 12 bit 3.2 GS/s analog output channels, and eight bidirectional DIO channels.
CLIP Signal NameDirectionData TypeDescription
Data ClockFrom CLIPBooleanFPGA clock used to sample analog input data.
Data Clock 2xFrom CLIPBooleanFPGA clock that samples analog input data at twice the rate of Data Clock.
AI Data ValidFrom CLIPBooleanIndicates whether AI sample data is vaild.
AI 0 Data NFrom CLIPfixed-point <±12,1>Returns analog input data through the AI 0 front panel connector.
AI 0 Data N-1
AI 0 Data N-2
AI 0 Data N-3
AI 0 Data N-4
AI 0 Data N-5
AI 0 Data N-6
AI 0 Data N-7
AI 0 Data N-8
AI 0 Data N-9
AI 0 Data N-10
AI 0 Data N-11
AI 0 Data N-12
AI 0 Data N-13
AI 0 Data N-14
AI 0 Data N-15
AI 1 Data NFrom CLIPfixed-point <±12,1>Returns analog input data through the AI 1 front panel connector.
AI 1 Data N-1
AI 1 Data N-2
AI 1 Data N-3
AI 1 Data N-4
AI 1 Data N-5
AI 1 Data N-6
AI 1 Data N-7
AI 1 Data N-8
AI 1 Data N-9
AI 1 Data N-10
AI 1 Data N-11
AI 1 Data N-12
AI 1 Data N-13
AI 1 Data N-14
AI 1 Data N-15
AO Ready for InputFrom CLIPBooleanIndicates whether the AO link is ready for data.
AO 0 Data NTo CLIPfixed-point <±12,1>Sends anaolg output samples through the AO 0 front panel connector.
AO 0 Data N-1
AO 0 Data N-2
AO 0 Data N-3
AO 0 Data N-4
AO 0 Data N-5
AO 0 Data N-6
AO 0 Data N-7
AO 0 Data N-8
AO 0 Data N-9
AO 0 Data N-10
AO 0 Data N-11
AO 0 Data N-12
AO 0 Data N-13
AO 0 Data N-14
AO 0 Data N-15
AO 1 Data NTo CLIPfixed-point <±12,1>Sends anaolg output samples through the AO 1 front panel connector.
AO 1 Data N-1
AO 1 Data N-2
AO 1 Data N-3
AO 1 Data N-4
AO 1 Data N-5
AO 1 Data N-6
AO 1 Data N-7
AO 1 Data N-8
AO 1 Data N-9
AO 1 Data N-10
AO 1 Data N-11
AO 1 Data N-12
AO 1 Data N-13
AO 1 Data N-14
AO 1 Data N-15
IO Error From CLIPI32Returns IO module errors, to be reported by the driver.
IO Ready From CLIPBooleanIndicates successful configuration of the IO module devices with the current clocking mode settings.

PXIe-5763 Socketed CLIP Signals

The PXIe-5763 CLIP provides access to four AC-coupled and DC-coupled 16-bit 500 MS/s analog input channels and eight bidirectional DIO channels.
CLIP Signal NameDirectionData TypeDescription
Data ClockFrom CLIPBooleanFPGA clock used to sample analog input data.
Data Clock 2xFrom CLIPBooleanFPGA clock that samples analog input data at twice the rate of Data Clock.
AI 0 Data NFrom CLIPfixed-point <±16,1>Returns analog input data through the AI 0 front panel connector. Each sample is a left-justified I16 data type.
AI 0 Data N-1
AI 0 Data N-2
AI 0 Data N-3
AI 1 Data NFrom CLIPfixed-point <±16,1>Returns analog input data through the AI 1 front panel connector. Each sample is a left-justified I16 data type.
AI 1 Data N-1
AI 1 Data N-2
AI 1 Data N-3
AI 2 Data NFrom CLIPfixed-point <±16,1>Returns analog input data through the AI 2 front panel connector. Each sample is a left-justified I16 data type.
AI 2 Data N-1
AI 2 Data N-2
AI 2 Data N-3
AI 3 Data NFrom CLIPfixed-point <±16,1>Returns analog input data through the AI 3 front panel connector. Each sample is a left-justified I16 data type.
AI 3 Data N-1
AI 3 Data N-2
AI 3 Data N-3

PXIe-5764 Socketed CLIP Signals

The PXIe-5764 CLIP provides access to four AC-coupled and DC-coupled 14-bit 1 GS/s analog input channels and eight bidirectional DIO channels.
CLIP Signal NameDirectionData TypeDescription
Data ClockFrom CLIPBooleanFPGA clock used to sample analog input data.
Data Clock 2xFrom CLIPBooleanFPGA clock that samples analog input data at twice the rate of Data Clock.
AI 0 Data NFrom CLIPFrom CLIPfixed-point <±16,1>Returns analog input data through the AI 0 front panel connector. Each sample is a left-justified I16 data type.
AI 0 Data N-1
AI 0 Data N-2
AI 0 Data N-3
AI 0 Data N-4
AI 0 Data N-5
AI 0 Data N-6
AI 0 Data N-7
AI 1 Data NFrom CLIPfixed-point <±16,1>Returns analog input data through the AI 1 front panel connector. Each sample is a left-justified I16 data type.
AI 1 Data N-1
AI 1 Data N-2
AI 1 Data N-3
AI 1 Data N-4
AI 1 Data N-5
AI 1 Data N-6
AI 1 Data N-7
AI 2 Data NFrom CLIPfixed-point <±16,1>

Returns analog input data through the AI 2 front panel connector. Each sample is a left-justified I16 data type

AI 2 Data N-1
AI 2 Data N-2
AI 2 Data N-3
AI 2 Data N-4
AI 2 Data N-5
AI 2 Data N-6
AI 2 Data N-7
AI 3 Data NFrom CLIPfixed-point <±16,1>

Returns analog input data through the AI 3 front panel connector. Each sample is a left-justified I16 data type

AI 3 Data N-1
AI 3 Data N-2
AI 3 Data N-3
AI 3 Data N-4
AI 3 Data N-5
AI 3 Data N-6
AI 3 Data N-7

PXIe-5775 Socketed CLIP Signals

The PXIe-5775 CLIP provides access to two AC-coupled 12-bit 3.2 GS/s analog input channels and eight bidirectional DIO channels.
CLIP Signal NameDirectionData TypeDescription
Data ClockFrom CLIPBooleanFPGA clock used to sample analog input data.
Data Clock 2xFrom CLIPBooleanFPGA clock that samples analog input data at twice the rate of Data Clock.
AI Data ValidFrom CLIPBooleanIndicates whether AI sample data is vaild.
AI 0 Data NFrom CLIPfixed-point <±12,1>Returns analog input data through the AI 0 front panel connector.
AI 0 Data N-1
AI 0 Data N-2
AI 0 Data N-3
AI 0 Data N-4
AI 0 Data N-5
AI 0 Data N-6
AI 0 Data N-7
AI 0 Data N-8
AI 0 Data N-9
AI 0 Data N-10
AI 0 Data N-11
AI 0 Data N-12
AI 0 Data N-13
AI 0 Data N-14
AI 0 Data N-15
AI 1 Data NFrom CLIPfixed-point <±12,1>Returns analog input data through the AI 1 front panel connector.
AI 1 Data N-1
AI 1 Data N-2
AI 1 Data N-3
AI 1 Data N-4
AI 1 Data N-5
AI 1 Data N-6
AI 1 Data N-7
AI 1 Data N-8
AI 1 Data N-9
AI 1 Data N-10
AI 1 Data N-11
AI 1 Data N-12
AI 1 Data N-13
AI 1 Data N-14
AI 1 Data N-15
IO ErrorFrom CLIPI32Returns IO module errors, to be reported by the driver.
IO ReadyFrom CLIPBooleanIndicates successful configuration of the IO module devices with the current clocking mode settings.