Setting Chassis Master Hardware Synchronization Devices
- Updated2025-04-08
- 1 minute(s) read
Setting Chassis Master Hardware Synchronization Devices
Use a chassis master hardware synchronization device to control the synchronization of all hardware in a chassis.
- Launch your project in the VeriStand Editor.
- In the Project Files pane, left-click a system definition file (.nivssdf) and select Configure in System Explorer.
-
Choose to add and configure one of the following hardware
devices to the system definition.
Device Type Device Configuration NI-DAQ The NI-DAQ device must have at least one analog input or output channel. NI FPGA Any NI FPGA device. Timing and Sync The timing and sync device must have the capability to drive the 0 line. Note The RTSI 0 line is a digital line that sends a clock signal that synchronizes all hardware I/O devices in the system. - Click in the configuration tree to open the Chassis Configuration page.
- Click Chassis master hardware synchronization device to select the hardware device.
- Save the system definition file.
Related Information
- Adding and Configuring a DAQ Device
Use DAQ devices to support analog, digital, and counter I/O functions such as acquiring waveform data.
- Adding NI FPGA Targets
Use NI FPGA targets to create customizable I/O, help with data preprocessing and postprocessing, add high-speed closed-loop control, and simulate a variety of sensors for hardware-in-the-loop testers
- Adding and Configuring Timing and Sync Devices
Use a timing and sync device to synchronize more than one chassis.
- Using Synchronization to Build Integration Test Systems with VeriStand