Adapter Module Interface Protocol

FlexRIO FPGA modules can interface to a wide variety of adapter modules. These modules may have different Vcco/VccoA/VccoB power requirements, as well as a variety of GPIO I/O standards and signal directions. FlexRIO devices also allow users to change I/O personalities with each different adapter module. Consequently, NI recommends that each adapter module design contain an EEPROM for identification and protection.

This identification EEPROM is connected to dedicated pins and designated at a specific I2C, allowing the FlexRIO driver to identify the adapter module you insert. Include an EEPROM in your design to allow for improved electrical protection for the adapter module and the FlexRIO FPGA module. Using an identification EEPROM prevents the use of incompatible adapter module settings, such as using incorrect power rails and double-driving digital interface pins. Refer to the EEPROM Overview section for additional information about adding an ID EEPROM to your adapter module design.

The FlexRIO device employs the following adapter module identification, power up, and removal processes to prevent applying improper voltages or double-driving signals.

Adapter Module Insertion Protocol

The following figure shows the process that the FlexRIO system performs when you insert a new adapter module into the FlexRIO FPGA module.

Note The FlexRIO system also performs the following steps when you download a new LabVIEW FPGA bitstream to the FlexRIO device or when you assert a Reset command.

Note The steps for detecting an adapter module are performed during device configuration. For more information about adapter module configuration, refer to the FlexRIO Adapter Module Development Kit.
Note You can confirm proper adapter module connection or adapter module mismatch in the IO Module Properties Status dialog in LabVIEW. In your LabVIEW Project Explorer window, right-click the IO Module item under the FPGA Target and select Properties to display the IO Module Properties dialog box. Click the Status category to view the adapter module Status dialog.

Adapter Module Removal Protocol

To properly remove an adapter module from the FlexRIO FPGA module, you must disable the adapter module within the LabVIEW FPGA user interface. To disable the adapter module within LabVIEW, complete the following steps:

  1. In your LabVIEW Project Explorer window, right-click the IO Module item under the FPGA Target and select Properties to display the IO Module Properties dialog box.
  2. Click the Status category to view the adapter module Status dialog.
  3. Deselect the checkbox for Enable IO Module Power. When you deselect this option, firmware tristates the FlexRIO I/O and disables all adapter module power rails.
  4. Click OK.

FlexRIO driver software allows users to enable and disable adapter modules, as well as EEPROM access, within the LabVIEW interface. Refer to the FlexRIO Adapter Module Development Kit for more information about programming your adapter module EEPROM.

EEPROM Overview

NI strongly recommends that you add an EEPROM to your adapter module for identification purposes. Adding an EEPROM to you adapter module helps provide better electrical protection for both the adapter module and the FlexRIO FPGA module. It also helps to improve the software configuration experience within LabVIEW FPGA.

The adapter module identification EEPROM included in your design must be an I2C-capable 2 Kbit device (256 × 8). These parts are widely available from electronics manufacturers and are often identified as 24C02. Manufacturers typically place a prefix to identify their version. For example, the ST Microelectronics EEPROM part number is M24C02.

The following figure shows a complete FlexRIO EEPROM connection circuit. This circuit shows the connections to the EEPROM (U1) and two additional connections required for proper adapter module configuration. The supporting parts required for the EEPROM are a bypass capacitor (C1) on the line from Veeprom, a pull-up resistor (R1) on address line A1 to Veeprom, and a pull-down resistor (R2) on the WP line. C1 is a 0.1 μF ceramic capacitor with a voltage rating of 6.3 V or higher. For best performance, use a capacitor with an X7R dielectric. Use 4.7 kΩ resistors, which can be any resistor type rated for at least 25 V and 10% tolerance or better. You can find other details regarding this interface in the EEPROM datasheet. For more information about EEPROM use and programming in your application, refer to the FlexRIO Adapter Module Development Kit.

Note The I2C address for the EEPROM is 0x52. Use 0xA4 for write operations and 0xA5 for read operations. Use the following bit fields to ensure the correct I2C address.
1 0 1 0 0 1 0 R/W
EEPROM Device Type Identifier Chip Enable Operation

1 = R

0 = W
A2 A1 A0