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    PXIe-5654 User Manual

    PXIe, 250 kHz to 20 GHz, PXI RF Analog Signal Generator

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    Table of Contents
    • PXIe-5654 User Manual
    • PXIe-5654 Overview
    • Driver Support
    • Components of a PXIe-5654 System
    • Part Numbers for Recommended Cables and Accessories
    • PXIe-5654 Theory of Operation
      • PXIe-5654 Block Diagram
      • Hardware State Diagram
      • PXI Trigger Lines
      • System Reference Clock
      • PXIe-5696 Block Diagram
    • Frequency Tuning Times
    • Amplitude Settling Times
    • Phase Noise and Signal-to-Noise Ratio
    • NI-RFSG Examples
    • PXIe-5654 Front Panel and LEDs
    • PXIe-5696 Front Panel and LEDs
    • Why Is the ACCESS LED Off When the Chassis Is On?
    • Safety Guidelines
    • Device Warm-Up
    • Temperature Monitoring
    • Unpacking the Kit
    • Installing the Software
    • Installing the PXIe-5654
    • Connecting to the PXIe-5654
    • Verifying the Installation in MAX
    • Power On and Reset Conditions
    • Using the PXIe-5654
    • Maintaining PXI Express Systems
    • PXIe-5654 Factory Calibration
    Product DocumentationPXIe-5654 User ManualPXIe-5654 Theory of OperationCurrent page
    Table of Contents

    PXIe-5654 Theory of Operation

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    • Updated2024-09-17
    • 1 minute(s) read
      • PXIe-5654
      • User Manual

    PXIe-5654 Theory of Operation

    Refer to block diagrams and state models to understand the hardware and software design behind the PXIe-5654 .

    • PXIe-5654 Block Diagram
    • Hardware State Diagram
    • PXI Trigger Lines
      Eight PXI bus trigger lines are highly flexible and can be used in a variety of ways.
    • System Reference Clock
      The PXI chassis supplies the PXI 10 MHz system Reference Clock signal (PXI_CLK10), independently to each peripheral slot.
    • PXIe-5696 Block Diagram
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