NI-TClk Synchronization Repeatability Optimization
- Updated2023-02-21
- 1 minute(s) read
NI-TClk Synchronization Repeatability Optimization
NI-TClk measures the time between the Sync Pulse Clock and the TClk using the niTClk Synchronize VI or the niTClk_Synchronize function. The imprecision associated with this measurement is usually very small, relative to the TClk timebase. NI-TClk adjusts the TClks and the TClk timebases on the devices, based on this measurement. Some devices adjust their TClk timebases with very fine resolution, usually using an oscillator phase DAC and a phase-locked loop (PLL).
These devices exhibit synchronization jitter from repeated calls to the niTClk Synchronize VI or the niTClk_Synchronize function. You can eliminate the jitter associated with TClk measurements for most devices, by setting the oscillator phase DAC value directly through the individual product drivers. The procedure for eliminating the jitter is listed in the following steps.
- Configure the devices for acquisition or generation synchronized with the NI-TClk.
- After acquiring or generating the signal, read the oscillator phase DAC attribute using the individual product drivers for each synchronized device.
- Store the phase DAC attribute values.
- Before running the program again, change the program to set the phase DAC attributes to the stored values using the individual product drivers for each synchronized device before calling the niTClk Synchronize VI or the niTClk_Synchronize function.
When you follow this procedure, NI-TClk adjusts TClks but not TClk timebases on the synchronized devices, and the synchronization jitter is minimized.