Wafer-Level Parametric Test
Wafer-level test engineers need to reduce test time without sacrificing measurement quality and accuracy.
Learn more about how you can lower your test cost with a platform-based approach to semiconductor test.
Use the PXI platform to reduce test time, decrease cost by 75 percent, and perform process experiments that were previously impossible.
PXI provides the foundation for high-uptime, SMU-per-pin wafer-level reliability systems powered by the latest commercial processors and best-in-class PXI SMU portfolio.
NI SMUs combine the power and measurement performance of traditional box SMUs with NI technology that makes them smaller, faster, and more flexible.
APPLICATION RESOURCE
PXI Platform Resource Kit
Learn the basics of the PXI platform for semiconductor characterization with architectural notes, relevant case studies, and performance metrics.