USRP-2974 Specifications

Definitions

Warranted specifications describe the performance of a model under stated operating conditions and are covered by the model warranty.

Characteristics describe values that are relevant to the use of the model under stated operating conditions but are not covered by the model warranty.

  • Typical specifications describe the performance met by a majority of models.
  • Nominal specifications describe an attribute that is based on design, conformance testing, or supplemental testing.

Specifications are Characteristics unless otherwise noted.

Conditions

Specifications are valid at 25 °C unless otherwise noted.

USRP-2974 Pinout

Use the pinout to connect to terminals on the USRP-2974.

Figure 1. Front Panel


Table 1. Connector Descriptions
Connector Use
RF 0 TX1 RX1 Input and output terminal for the RF signal. TX1 RX1 is an SMA (f) connector with an impedance of 50 Ω and is a single-ended input or output channel.
RX2 Input terminal for the RF signal. RX2 is an SMA (f) connector with an impedance of 50 Ω and is a single-ended input channel.
AUX I/O General-purpose I/O (GPIO) port. AUX I/O is controlled by the FPGA.
RF 1 TX1 RX1 Input and output terminal for the RF signal. TX1 RX1 is an SMA (f) connector with an impedance of 50 Ω and is a single-ended input or output channel.
RX2 Input terminal for the RF signal. RX2 is an SMA (f) connector with an impedance of 50 Ω and is a single-ended input channel.
DP DisplayPort connector to connect one monitor for your controller.
USB2.0 USB ports that support common USB peripheral devices such as flash drives, hard drives, keyboards, and mice.
USB3.0 USB ports that support common USB peripheral devices such as flash drives, hard drives, keyboards, and mice.
1G ETH RJ45 port used for 1G ETH connectivity to other ethernet devices.
μUSB USB port used for UART connectivity to the controller.
1G/10G ETH 0 SFP+ port used for 10G ETH connectivity to other ethernet devices. Connects to the embedded Linux computer for communication with LabVIEW RT.
1G/10G ETH 1 SFP+ port used for 1G/10G ETH connectivity to other ethernet devices. Connects to the FPGA. Not currently supported in LabVIEW Communications System Design Suite.
Table 2. LEDs
LED Description Color State Indication
REF Indicates the status of the reference signal. OFF There is no reference signal, or the device is not locked to the reference signal.
Green Blinking The device is not locked to the reference signal.
Solid The device is locked to the reference signal.
PPS Indicates the pulse per second (PPS). OFF There is no PPS timing reference signal, or the device is not locked to the reference signal.
Green Blinking The device is locked to the PPS timing reference signal.
GPS Indicates whether the GPSDO is locked. OFF There is no GPSDO or the GPSDO is not locked.
Green Solid The GPSDO is locked.
STATUS Indicates the status of the device. OFF The device initialized successfully and is ready for use.
Red Blinking Hardware error. An internal power supply has failed. Check front-panel I/O connections for shorts. Remove any shorts and cycle power to the USRP-2974. Contact NI if the problem persists.
PWR Indicates the power status of the device. OFF The device is powered off.
Green Solid The device is powered on.
10/100/1000 Indicates the speed of the Gigabit Ethernet link. OFF No link, or 10 Mbps link.
Green Solid 100 Mbps link.
Amber Solid 1,000 Mbps link.
ACT/LINK Indicates the Gigabit Ethernet link activity or status. OFF No link has been established.
Green Solid A link has been negotiated.
Blinking Activity on the link.
1G/10G ETH 0 ACT/LINK Indicates the status of the SFP+ port. OFF The link is down.
Green Solid The link is up.
Blinking The link is active (transmitting and receiving).
10GbE Indicates the status of the 10G ETH link. OFF The 10G ETH link is down.
Green Solid The 10G ETH link is up.
1G/10G ETH 1 10GbE Indicates the status of the 10G ETH link. OFF The 10G ETH link is down.
Green Solid The 10G ETH link is up.
Figure 2. Back Panel


Table 3. Connector Descriptions
Connector Use
REF OUT Output terminal for an external reference signal for the LO on the device. REF OUT is an SMA (f) connector with an impedance of 50 Ω, and it is a single-ended reference output. The output signal at this connector is 10 MHz at 3.3 V.
REF IN Input terminal for an external reference signal for the LO on the device. REF IN is an SMA (f) connector with an impedance of 50 Ω, and it is a single-ended reference input. REF IN accepts a 10 MHz signal with a minimum input power of 0 dBm (0.632 V pk-pk) and a maximum input power of 15 dBm (3.56 V pk-pk) for a square wave or sine wave.
PPS TRIG OUT Output terminal for the PPS timing reference. PPS TRIG OUT is an SMA (f) connector with an impedance of 50 Ω and is a single-ended input. The output signal is 0 V to 3.3 V TTL. You can also use this port as a triggered output (TRIG OUT) that you program with the PPS Trig Out I/O signal.
PPS TRIG IN Input terminal for PPS timing reference. PPS TRIG IN is an SMA (f) connector with an impedance of 50 Ω and is a single-ended input channel. PPS TRIG IN accepts 0 V to 3.3 V TTL and 0 V to 5 V TTL signals. You can also use this port as a triggered input (TRIG IN) that you control using NI-USRP software.
GPS ANT Input terminal for the GPS antenna signal. GPS ANT is an SMA (f) connector with a maximum input power of -15 dBm and an output of 5 V DC to power an active antenna.
Notice Do not terminate the GPS ANT port if you do not use it.
PCIe x4 Port for a PCI Express Generation 2, x4 bus connection through an MXI Express four-lane cable. Can be used to connect an external USRP device or external chassis.
SYSTEM POWER IN Input that accepts a 15 V ± 5%, 10 A external DC power connector.

Controller

System on module (SoM) Congatec COM Express conga-TS170
CPU Intel Core i7 6822EQ (2 GHz Quad Core)
Memory[1]1 Module assembly A has a memory of 8 GB. All other module assemblies have a memory of 16 GB. SO-DIMM DDR4 16 GB
NVMe SSD[2]2 Module assembly A has an NVMe SSD of 250 GB. All other module assemblies have an NVMe SSD of 500 GB. 500 GB
SFP+[3]3 Can be bypassed to the FPGA. 10G ETH connection to the SoM
Cabled PCIe PCIe Gen 2 x 4
MicroUSB[4]4 Device port for external host. USB-to-UART to the SoM
RJ45 1G ETH host connection

FPGA and Baseband

FPGA Kintex-7 XC7K410T
DRAM 1 GB
Baseband analog-to-digital converter (ADC) resolution 14 bit
Baseband digital-to-analog converter (DAC) resolution 16 bit
Maximum I/Q sample rate 200 MS/s
SFP+[5]5 Can be bypassed to the SoM if using the 10 GbE as protocol. High speed serial link to one of the FPGA GTX transceivers

RF

Transmitter

Number of channels 2
Frequency range 10 MHz to 6 GHz
Frequency step <1 kHz
Maximum output power (Pout), 10 MHz to 4 GHz 50 mW to 100 mW (17 dBm to 20 dBm)
Maximum output power (Pout), 4 GHz to 6 GHz 5 mW to 50 mW (7 dBm to 17 dBm)
Gain range[6]6 The output power resulting from the gain setting varies over the frequency band and among devices. 0 dB to 31.5 dB
Gain step 0.5 dB
Maximum instantaneous real-time bandwidth[7]7 The USRP-2974 transmitter path has 160 MHz of bandwidth throughout the full frequency range of the device. 160 MHz

Receiver

Number of channels 2
Frequency range 10 MHz to 6 GHz
Frequency step <1 kHz
Gain range[8]8 The received signal amplitude resulting from the gain setting varies over the frequency band and among devices. 0 dB to 37.5 dB
Gain step 0.5 dB
Maximum input power (Pin) -15 dBm
Noise figure 5 dB to 7 dB
Maximum instantaneous real-time bandwidth[9]9 The USRP-2974 receiver path has 84 MHz of bandwidth for center frequencies from 10 MHz to 500 MHz. 160 MHz

GPS Disciplined Oscillator (GPSDO)

Table 4. Frequency Accuracy
OCXO (not locked to GPS) 25 ppb
OCXO (locked to GPS) 5 ppb
Note Frequency accuracy is based on oven-controlled crystal oscillator (OCXO) vendor specifications and is not measured. Alternatively, you can incorporate an external reference source to provide a more precise frequency Reference Clock and to achieve better frequency accuracy.
Table 5. Active Antenna
Voltage 5 V
Power 0.7 W
Note NI recommends periodically locking the GPS for at least 1 hour to recalibrate the GPSDO module accuracy.

Power

Notice The protection provided by this product may be impaired if it is used in a manner not described in this document.
Voltage range 14.25 V to 15.75 V
Current 10 A, maximum
Power 150 W, maximum
Notice The power supply must also meet any safety and compliance requirements for the country of use.
Note NI recommends using the USRP-2974 with the provided power supply (Power Supply, part number 723613-01). Contact NI if a replacement is needed.

Physical Characteristics

If you need to clean the module, wipe it with a dry towel.

Table 6. Physical Dimensions
(L × W × H) 29.08 cm × 21.84 cm × 7.98 cm (11.45 in. × 8.60 in. × 3.14 in.)
Weight 3.34 kg (7.35 lb)

Environment

Maximum altitude

2,000 m (800 mbar) (at 25 °C ambient temperature)

Pollution Degree

2

Indoor use only.

Operating Environment

Operating temperature

0 °C to 50 °C

Relative humidity range

10% to 90%, noncondensing

1 Module assembly A has a memory of 8 GB. All other module assemblies have a memory of 16 GB.

2 Module assembly A has an NVMe SSD of 250 GB. All other module assemblies have an NVMe SSD of 500 GB.

3 Can be bypassed to the FPGA.

4 Device port for external host.

5 Can be bypassed to the SoM if using the 10 GbE as protocol.

6 The output power resulting from the gain setting varies over the frequency band and among devices.

7 The USRP-2974 transmitter path has 160 MHz of bandwidth throughout the full frequency range of the device.

8 The received signal amplitude resulting from the gain setting varies over the frequency band and among devices.

9 The USRP-2974 receiver path has 84 MHz of bandwidth for center frequencies from 10 MHz to 500 MHz.