sbRIO-9629 Specifications
- Updated2024-03-12
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sbRIO-9629 Specifications
sbRIO-9629 Features
The sbRIO-9629 is an embedded CompactRIO Single-Board Controller that integrates a real-time processor, a user-reconfigurable FPGA, and digital I/O on a single printed circuit board (PCB). You can embed the sbRIO-9629 in high-volume OEM applications that require flexibility, reliability, and high performance. This controller features two Gigabit Ethernet connectors, two RS-232 serial ports, an RS-485 port, a CAN port, microSDHC, sixteen 16-bit analog inputs, four 16-bit analog outputs, four 5 V tolerant DIO ports, and a high-density RIO Mezzanine Card (RMC) connector that provides the option to connect two C Series I/O modules and 96 2.5 V/3.3 V single-ended digital I/O lines or 45 differential pairs.
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Components | sbRIO-9603 | sbRIO-9608 | sbRIO-9609 | sbRIO-9628 | sbRIO-9629 | sbRIO-9638 |
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Part Number | ||||||
Development Kit Part Number | 787287-01 | 787288-01 | 787289-01 | 787296-01 | 787298-01 | 787297-01 |
OEM Kit Part Number | 787287-02 | 787288-02 | 787289-02 | 787296-02 | 787298-02 | 787297-02 |
Performance | ||||||
Processor | Intel E3805 1.33 GHz Dual-Core | Intel E3845 1.91 GHz Quad-Core | Intel E3825 1.33 GHz Dual-Core | Intel E3845 1.91 GHz Quad-Core | Intel E3805 1.33 GHz Dual-Core | |
RAM (DDR3L) | 1 GB | 2 GB | 1 GB | 2GB | 1 GB | |
Disk (eMMC) | 4 GB | |||||
Xilinx Artix-7 FPGA | XC7A75T | XC7A200T | XC7A100T | XC7A200T | XC7A100T | |
Onboard Peripherals | ||||||
Ethernet | 2x IEEE 802.1AS-2011IEEE 1588-2008 (default end-to-end profile) | |||||
USB Type-C port | USB 2.0 device | |||||
USB Type-C port | 1x USB 3.1 Gen1 Host | |||||
DisplayPort Alt Mode | No | Yes | No | |||
USB Type-A port | — | 2x USB 2.0 host | ||||
SD port | — | microSDHC | ||||
CAN port | 1x CAN FD | |||||
RS-232 port | 1x | 2x | ||||
RS-485 port | — | 1x | ||||
Onboard IO [1]1 Programmable through LabVIEW FPGA and NI-DAQmx. | ||||||
Analog I/O | — | 16 SE/8 Differential, 233 kS/s, 16-bit, ±10 V to ±1 V | ||||
4x AO 100 kS/s/ch, 16-bit, ±10 V | ||||||
Digital I/O (5 V tolerant) | — | 4x DIO | 28x DIO | |||
RMC Connector | ||||||
C Series | 2x C Series interfaces[2]2 Programmable through LabVIEW FPGA and NI-DAQmx. | — | ||||
USB | USB 2.0 host | — | ||||
DIO | 96x DIO[3]3 Programmable with LabVIEW FPGA only. Configurable as 4x RS-232 UARTs or 2x RS-485 UARTs via the sbRIO CLIP generator., 3.3 V/2.5 V SE/Differential | — | ||||
PCIe | 1x PCIe x1 Gen 2.0 | — | ||||
SATA | 1x SATA Gen 2.0 | — | ||||
Power | Optional Input Power from RMC (9 V to 30 V), Output power to RMC (3.3 V and 5 V, FPGA VIO) | — |
Definitions
Warranted specifications describe the performance of a model under stated operating conditions and are covered by the model warranty.
Characteristics describe values that are relevant to the use of the model under stated operating conditions but are not covered by the model warranty.
- Typical specifications describe the performance met by a majority of models.
- Nominal specifications describe an attribute that is based on design, conformance testing, or supplemental testing.
Specifications are Typical unless otherwise noted.
Conditions
Specifications are valid for -40 °C to 85 °C unless otherwise noted.
Software
Supported operating system | NI Linux Real-Time (64-bit) | ||||||||
Supported C Series module programming modes | Real-Time (NI-DAQmx) mode Real-Time Scan (I/O Variables) mode LabVIEW FPGA mode | ||||||||
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Driver software | |||||||||
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To set up a C/C++ based toolchain, visit ni.com/info and enter the info code NILRTCrossCompile for more information.
Processor
CPU | Intel Atom E3845 |
Number of cores | 4 |
CPU frequency | 1.91 GHz |
On-die L2 cache | 1 MB (shared) |
Memory
Density | 2 GB |
Type | DDR3L |
Maximum theoretical data rate | 8.533 GB/s |
Storage
Storage | 4 GB |
Storage type | Planar SLC NAND |
Network/Ethernet Port
Number of ports | 2 |
Network interface | 10Base-T, 100Base-TX, and 1000Base-T Ethernet |
Compatibility | IEEE 802.3 |
Communication rates | 10 Mb/s, 100 Mb/s, 1000 Mb/sauto-negotiated |
Maximum cabling distance | 100 m/segment |
Network Timing and Synchronization
Protocol | IEEE 802.1AS-2011 IEEE 1588-2008 (default end-to-end profile) |
Network synchronization accuracy[5]5 Network synchronization is system-dependent. For information about network synchronization accuracy, visit ni.com/r/criosync. | <1 μs |
USB Ports
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SD Association MicroSD Card Slot
MicroSD card support | MicroSD and MicroSDHC standards |
Supported interface speeds | Full speed, high speed, UHS‐I SDR50, and DDR50 |
Internal Real-Time Clock
Accuracy | 200 ppm; 40 ppm at 25 °C |
CMOS Battery
Onboard battery type | BR1632 | ||||||||
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RS-232 (DTE) Serial Port
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Baud rate support | Arbitrary | ||||||
Maximum baud rate | 921,600 b/s | ||||||
Data bits | 5, 6, 7, 8 | ||||||
Stop bits | 1, 2 | ||||||
Parity | Odd, Even, Mark, Space | ||||||
Flow control | RTS/CTS, XON/XOFF, DTR/DSR, None | ||||||
Programming method | LabVIEW Real-Time (NI-VISA) |
RS-485 Serial Port
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Maximum baud rate | 921,600 b/s | ||||||
Data bits | 5, 6, 7, 8 | ||||||
Stop bits | 1, 1.5, 2 | ||||||
Parity | Odd, Even, Mark, Space | ||||||
Flow control | XON/XOFF | ||||||
Wire mode | 4-wire, 2-wire, 2-wire auto | ||||||
Isolation voltage, port to earth ground | None |
Reconfigurable FPGA
FPGA type | Xilinx Artix-7 XC7A200T |
Number of flip-flops | 269,200 |
Number of 6-input LUTs | 134,600 |
Number of DSP slices (18 × 25 multipliers) | 740 |
Available block RAM | 13,140 kbits |
Number of DMA channels | 16 |
Number of logical interrupts | 32 |
CAN
Number of interfaces | 1 (CAN0) | ||||||
Programming Method | LabVIEW FPGA | ||||||
Onboard CAN transceiver | TI TCAN4550 | ||||||
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Digital I/O on RMC Connector
Number of DIO channels | 96 single-ended, maximum 45 differential, maximum |
Maximum tested current per channel | ±3 mA |
I/O Standard | Input Voltage Low, V IL | Input Voltage High, V IH | Output Voltage Low, V OL Maximum | Output Voltage High, V OH Minimum | Drive Strength | FPGA_VIO | ||
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Minimum | Maximum | Minimum | Maximum | |||||
LVTTL | -0.3 V | 0.8 V | 2 V | 3.45 V | 0.4 V | 2.4 V | 4 mA, 8 mA, 12 mA, 16 mA, 24 mA | 3.3 V |
LVCMOS33 | FPGA_VIO - 0.40 V | |||||||
LVCMOS25 | 0.7 V | 1.7 V | FPGA_VIO + 0.30 V | 4 mA, 8 mA, 12 mA, 16 mA | 2.5 V |
I/O Standard | Input Common Mode Voltage, V ICM | Input Differential Voltage, V ID | FPGA_VIO | ||||
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Minimum | Typical | Maximum | Minimum | Typical | Maximum | ||
LVDS_25 | 0.3 V | 1.2 V | 1.5 V | 0.1 V | 0.35 V | 0.6 V | 2.5 V |
MINI_LVDS_25 | 1.71 V | 0.2 V | 0.4 V | 0.6 V |
I/O Standard | Output Common Mode Voltage, V OCM | Output Differential Voltage, V OD | FPGA_VIO | ||||
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Minimum | Typical | Maximum | Minimum | Typical | Maximum | ||
LVDS_25 | 1.0 V | 1.25 V | 1.425 V | 0.247 V | 0.35 V | 0.6 V | 2.5 V |
MINI_LVDS_25 | 1.0 V | 1.2 V | 1.4 V | 0.3 V | 0.45 V | 0.6 V[7]7 Internal VCCAUX = 1.8 V ±5% |
Pins | Power Rail | Shortest Trace Length | Longest Trace Length | Length Matching Within Differential Pairs |
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DIO_47 … DIO_0 | FPGA_VIO<47..0> | 12.7 mm (0.5 in.) | 40.13 mm (1.58 in.) | 0.25 mm (0.01 in.) |
DIO_96 … DIO_48 | FPGA_VIO<96..48> | 46.23 mm (1.82 in.) | 71.88 mm (2.83 in.) | 0.25 mm (0.01 in.) |
Additional RS-232 UART Support
Number of interfaces | 4 (ASRL4, ASRL5, ASRL6, ASRL7) |
Maximum baud rate | 921,600 b/s |
Data bits | 5, 6, 7, 8 |
Stop bits | 1, 2 |
Parity | Odd, Even, Mark, Space |
Flow control | RTS/CTS, XON/XOFF, DTR/DSR, None |
Additional RS-485 UART Support
Number of interfaces | 2 (ASRL8, ASRL9) |
Maximum baud rate | 921,600 b/s |
Data bits | 5, 6, 7, 8 |
Stop bits | 1, 2 |
Parity | Odd, Even, Mark, Space |
Flow control | XON/XOFF |
Transmission modes | 2-wire, 2-wire auto, 4-wire |
Analog Input Characteristics
Number of channels | 16 single-ended or 8 differential | ||||||||||
ADC resolution | 16 bits | ||||||||||
Maximum aggregate sampling rate | 233 kS/s | ||||||||||
Input range | ±10 V, ±5 V, ±2 V, ±1 V | ||||||||||
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Calibration Interval | Measurement Conditions | Residual Gain Error | Residual Offset Error |
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2 years | Typical (25 °C, ±5 °C) | 150 ppm of reading | 60 ppm of range |
Maximum (-40 to 85 °C) | 1,200 ppm of reading | 1,000 ppm of range | |
15 years | Typical (25 °C, ±5 °C) | 400 ppm of reading | 60 ppm of range |
Maximum (-40 to 85 °C) | 3,400 ppm of reading | 1,000 ppm of range |
Gain drift | 6 ppm of reading/°C | ||||||||||
Offset drift | 4 ppm of range/°C | ||||||||||
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INL | ±64 ppm of range, maximum | ||||||||||
DNL | No missing codes guaranteed | ||||||||||
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Input bandwidth (-3 dB) | 540 kHz, typical | ||||||||||
Crosstalk (10 kHz) | -70 dB |
Analog Output Characteristics
Number of channels | 4 |
DAC resolution | 16 bits |
Number of Channels | Maximum Update Rate | Minimum Update Time |
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1 | 298 kS/s | 3.35 µs |
2 | 165 kS/s | 6.05 µs |
3 | 114 kS/s | 8.75 µs |
4 | 86.9 kS/s | 11.5 µs |
Range | ±10 V | ||||||||
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Output impedance | 2 Ω typical | ||||||||
Current drive | ±3 mA/channel maximum | ||||||||
Protection | Short-circuit to ground | ||||||||
Power-on state[8]8 When the analog output initializes, a voltage glitch occurs for about 300 ns, peaking at -0.4 V, typical. | 0 V |
Calibration Interval | Measurement Conditions | Residual Gain Error | Residual Offset Error |
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2 years | Typical (25 °C, ±5 °C) | 450 ppm of reading | 120 ppm of range |
Maximum (-40 to 85 °C) | 1,200 ppm of reading | 2,500 ppm of range | |
15 years | Typical (25 °C, ±5 °C) | 900 ppm of reading | 120 ppm of range |
Maximum (-40 to 85 °C) | 3,000 ppm of reading | 2,500 ppm of range |
Gain drift | 12 ppm of reading/°C | ||||||||
Offset drift | 12 ppm of range/°C | ||||||||
INL (Endpoint Fit) | ±184 ppm of range, maximum | ||||||||
DNL | ±16 ppm of range, maximum | ||||||||
Capacitive drive | 1.5 nF, typical | ||||||||
Slew rate | 4 V / μsec, typical | ||||||||
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Power Outputs on RMC
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Power Inputs on RMC
Voltage input range | 9 V DC to 30 V DC | ||||||||
Reversed-voltage protection | 30 V DC | ||||||||
Power consumption | 28 W, maximum | ||||||||
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3.3 V Digital I/O on 50-Pin IDC Connector
Number of DIO channels | 4 | ||||||
Maximum tested current per channel | ±3 mA | ||||||
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Real-Time (NI-DAQmx) Mode
The following specifications are applicable for modules and slots programmed in Real-Time (NI-DAQmx) mode. For more information about using modules in LabVIEW FPGA mode or Real-Time Scan (I/O Variables) mode, visit ni.com/r/swsupport.
Analog Input
Input FIFO size | 253 samples per slot |
Maximum sample rate | Determined by the C Series module or modules |
Timing accuracy | 50 ppm of sample rate |
Timing resolution | 12.5 ns |
Number of channels supported | Determined by the C Series module or modules |
Number of hardware-timed tasks | 8 |
Analog Output
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Maximum update rate | 1.6 MS/s |
Timing accuracy | 50 ppm of sample rate |
Timing resolution | 12.5 ns |
Waveform onboard regeneration FIFO | 8,191 samples shared among channels used |
Waveform streaming FIFO | 253 samples per slot |
Digital Waveform
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Timing accuracy | 50 ppm |
Number of digital input hardware-timed tasks | 8 |
Number of digital output hardware-timed tasks | 8 |
General-Purpose Counters/Timers
Number of counters/timers | 4 |
Resolution | 32 bits |
Counter measurements | Edge counting, pulse, semi-period, period, two-edge separation, pulse width |
Position measurements | X1, X2, X4 quadrature encoding with Channel Z reloading; two-pulse encoding |
Output applications | Pulse, pulse train with dynamic updates, frequency division, equivalent time sampling |
Internal base clocks | 80 MHz, 20 MHz, 13.1072 MHz, 12.8 MHz, 10 MHz, 100 kHz |
External base clock frequency | 0 MHz to 20 MHz |
Base clock accuracy | 50 ppm |
Output frequency | 0 MHz to 20 MHz |
Inputs | Gate, Source, HW_Arm, Aux, A, B, Z, Up_Down |
Routing options for inputs | Any module PFI, analog trigger, many internal signals |
FIFO | Dedicated 127-sample FIFO |
Frequency Generator
Number of channels | 1 |
Base clocks | 20 MHz, 10 MHz, 100 kHz |
Divisors | 1 to 16 (integers) |
Base clock accuracy | 50 ppm |
Output | Any module PFI terminal |
Module PFI
Functionality | Static digital input, static digital output, timing input, and timing output |
Timing output sources | Many analog input, analog output, counter, digital input, and digital output timing signals |
Timing input frequency | 0 MHz to 20 MHz |
Timing output frequency | 0 MHz to 20 MHz |
Digital Triggers
Source | Any module PFI terminal |
Polarity | Software-selectable for most signals |
Analog input function | Start Trigger, Reference Trigger,Pause Trigger,Sample Clock,Sample Clock Timebase |
Analog output function | Start Trigger, Pause Trigger,Sample Clock,Sample Clock Timebase |
Counter/timer function | Gate, Source, HW_Arm, Aux, A, B, Z, Up_Down |
Module I/O States
At power-on | Module-dependent. Refer to the documentation for each C Series module. |
Time-Based Triggers and Timestamps
Number of time-based triggers | 5 | ||||||
Number of timestamps | 6 | ||||||
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RMC Support Signals
C Series | 2 interfaces | ||||||
PCIe | Gen 2.0 | ||||||
SATA | Gen 2.0 | ||||||
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Signal | VIL | VIH | ||
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Minimum | Maximum | Minimum | Maximum | |
SYS_RST# | -0.30 V | 0.80 V | 2.00 V | 3.60 V |
CLK_REQ |
Signal | VOL, Maximum | VOH, Minimum | Maximum Sink Current | Maximum Source Current |
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FPGA_CONF | 0.40 V | 2.90 V | 8.00 mA | 8.00 mA |
STATUS_LED | ||||
RST# | ||||
USB_CPEN | 4.00 mA | 4.00 mA |
Power Requirements
The sbRIO-9629 requires a power supply connected either to the power connector or through the VIN_filtered pins through the RMC. Refer to the Connecting the sbRIO-96xx to Power section in the CompactRIO Single Board Controller with DAQmx Hardware Installation Manual on ni.com/manuals for information about connecting the power supply. Refer to the CompactRIO Single Board Controller with DAQmx System Development Manual on ni.com/manuals for more information about how to power the sbRIO-9629 through the RMC.
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Voltage input range | 9 V DC to 30 V DC | ||||||
Reversed-voltage protection | 30 V DC | ||||||
Power consumption with RMC | 55 W, maximum | ||||||
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Cell chemistry system | Lithium Carbon Monofluoride (Li/CF) |
Physical Characteristics
Weight | 155 g (5.5 oz) |
sbRIO-9629
Dimensions
Safety Voltages
V terminal to C terminal | 30 V DC, maximum, Measurement Category I |
Measurement Category I is for measurements performed on circuits not directly connected to the electrical distribution system referred to as MAINS voltage. MAINS is a hazardous live electrical supply system that powers equipment. This category is for measurements of voltages from specially protected secondary circuits. Such voltage measurements include signal levels, special equipment, limited-energy parts of equipment, circuits powered by regulated low-voltage sources, and electronics.
Environmental Guidelines
Local Ambient Temperature
Local ambient temperature is the temperature measured directly adjacent to the model.
Environmental Characteristics
Local ambient temperature | -40 °C to 85 °C | ||||||||||
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Storage | -40 °C to 85 °C |
Component | Maximum Case Temperature |
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CPU | Validate digitally. |
FPGA | Validate digitally. |
CPLD | 94 °C |
NI ASIC 1 | 120 °C |
NI ASIC 2 | 116 °C |
DDR memory | 95 °C |
NAND Flash | 91 °C |
ENET I210 | 95 °C |
USB PHY | 120 °C |
OSC | 112 °C |
Battery | 85 °C |
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Pollution Degree | 2 | ||||||
Maximum altitude | 5,000 m |
Safety Compliance Standards
This product is designed to meet the requirements of the following electrical equipment safety standards for measurement, control, and laboratory use:
- IEC 61010-1, EN 61010-1
- UL 61010-1, CSA C22.2 No. 61010-1
Electromagnetic Compatibility
This product meets the requirements of the following EMC standards for electrical equipment for measurement, control, and laboratory use:
- EN 61326-1 (IEC 61326-1): Class A emissions; Industrial immunity
- EN 55011 (CISPR 11): Group 1, Class A emissions
- AS/NZS CISPR 11: Group 1, Class A emissions
- FCC 47 CFR Part 15B: Class A emissions
- ICES-003: Class A emissions
Environmental Standards
This product meets the requirements of the following environmental standards for electrical equipment.
- IEC 60068-2-1 Cold
- IEC 60068-2-2 Dry heat
CE Compliance
This product meets the essential requirements of applicable European Directives, as follows:
- 2014/30/EU; Electromagnetic Compatibility Directive (EMC)
- 2011/65/EU; Restriction of Hazardous Substances (RoHS)
Product Certifications and Declarations
Refer to the product Declaration of Conformity (DoC) for additional regulatory compliance information. To obtain product certifications and the DoC for NI products, visit ni.com/product-certifications, search by model number, and click the appropriate link.
Environmental Management
NI is committed to designing and manufacturing products in an environmentally responsible manner. NI recognizes that eliminating certain hazardous substances from our products is beneficial to the environment and to NI customers.
For additional environmental information, refer to the Engineering a Healthy Planet web page at ni.com/environment. This page contains the environmental regulations and directives with which NI complies, as well as other environmental information not included in this document.
EU and UK Customers
Battery Replacement and Disposal
Battery Recycling
The model contains a replaceable battery. Products containing lithium must be disposed of or recycled in accordance with all local laws and site regulations. For more information about disposing of or recycling this device's battery, refer to www.rayovac.com.
电子信息产品污染控制管理办法(中国RoHS)
NI Services
Visit ni.com/support to find support resources including documentation, downloads, and troubleshooting and application development self-help such as tutorials and examples.
Visit ni.com/services to learn about NI service offerings such as calibration options, repair, and replacement.
Visit ni.com/register to register your NI product. Product registration facilitates technical support and ensures that you receive important information updates from NI.
NI corporate headquarters is located at 11500 N Mopac Expwy, Austin, TX, 78759-3504, USA.
1 Programmable through LabVIEW FPGA and NI-DAQmx.
2 Programmable through LabVIEW FPGA and NI-DAQmx.
3 Programmable with LabVIEW FPGA only. Configurable as 4x RS-232 UARTs or 2x RS-485 UARTs via the sbRIO CLIP generator.
4 LabVIEW FPGA Module is not required when using Real-Time Scan (I/O Variables) mode or Real-Time (NI-DAQmx) mode. To program the user-accessible FPGA on the sbRIO-9629, the LabVIEW FPGA Module is required.
5 Network synchronization is system-dependent. For information about network synchronization accuracy, visit ni.com/r/criosync.
6 RT = 100 Ω across P and N pairs at destination
7 Internal VCCAUX = 1.8 V ±5%
8 When the analog output initializes, a voltage glitch occurs for about 300 ns, peaking at -0.4 V, typical.
9 Pull-up on SYS_RST# is to 3.3 V when the model is in Run Mode, Safe Mode, and when in Sleep.
10 The CPU reduces its operating frequency when the die temperature reaches 108 °C. NI recommends keeping the die temperature below 108 °C to guarantee optimal performance. Refer to the CompactRIO Single Board Controller with NI-DAQmx Hardware Installation Manual for information about monitoring the CPU die temperature.
In This Section
- sbRIO-9629 Features
- Definitions
- Software
- Processor
- Memory
- Storage
- Network/Ethernet Port
- USB Ports
- SD Association MicroSD Card Slot
- Internal Real-Time Clock
- CMOS Battery
- RS-232 (DTE) Serial Port
- RS-485 Serial Port
- Reconfigurable FPGA
- CAN
- Digital I/O on RMC Connector
- Analog Input Characteristics
- Analog Output Characteristics
- Power Outputs on RMC
- Power Inputs on RMC
- 3.3 V Digital I/O on 50-Pin IDC Connector
- Real-Time (NI-DAQmx) Mode
- Power Requirements
- Physical Characteristics
- Safety Voltages
- Environmental Guidelines
- Safety Compliance Standards
- Electromagnetic Compatibility
- Environmental Standards
- CE Compliance
- Product Certifications and Declarations
- Environmental Management
- NI Services