PXIe-6349 Specifications

Definitions

Warranted specifications describe the performance of a model under stated operating conditions and are covered by the model warranty.

Characteristics describe values that are relevant to the use of the model under stated operating conditions but are not covered by the model warranty.

Typical specifications describe the performance met by a majority of models.
Nominal specifications describe an attribute that is based on design, conformance testing, or supplemental testing.

Specifications are Typical unless otherwise noted.

Analog Input

Note Floating inputs can cause unnecessary power consumption and higher operating temperatures. NI recommends connecting unused analog input channels to AIGND.

Number of channels

32 differential

ADC resolution

16 bits

DNL

No missing codes, warranted

INL

Refer to the AI Absolute Accuracy section.

Sample rate (simultaneous sampling on all channels sampled)
Maximum	500 kS/s
Minimum	No minimum

Timing resolution

10 ns

Timing accuracy

50 ppm of sample rate

Input coupling

DC

Input range

±1 V, ±2 V, ±5 V, ±10 V

Maximum working voltage for all analog inputs (AI±)
Ranges ±10 V, ±5 V	±11 V, Measurement Category I
Ranges ±2 V, ±1 V	±9 V, Measurement Category I

Caution Do not use for measurements within Categories II, III, and IV.

CMRR (at 60 Hz)

80 dB

Bandwidth (small signal)

2.0 MHz at ±1 V

2.9 MHz at other ranges

Input impedance

Device on
AI+ to AI GND	>1 GΩ in parallel with 18 pF
AI- to AI GND	>1 GΩ in parallel with 18 pF

Device off
AI+ to AI GND	2.37 kΩ
AI- to AI GND	2.37 kΩ

Input bias current

±6 nA

±90 nA, maximum over full temperature range

Crosstalk (at 100 kHz)

-80 dB

Input FIFO size

4,095 samples shared among channels used

Data transfers

DMA (scatter-gather), programmed I/O

Overvoltage protection for AI<0..31>
Device on	±30 V
Device off	±15 V

Input current during overvoltage conditions

±6.3 mA maximum/AI pin

Maximum AI channels in overvoltage

4 channels on AI<0..15> and 4 channels on AI<16..31>

Notice Exceeding overvoltage specifications may result in data corruption on non-overvoltaged channels.

Analog Triggers

Number of triggers

1

Source

AI <0..31>, APFI 0

Functions

Start Trigger, Reference Trigger, Pause Trigger, Sample Clock, Sample Clock Timebase

Source level
AI <0..31>	±Full scale
APFI 0	±10 V

Resolution

16 bits

Modes

Analog edge triggering, analog edge triggering with hysteresis, and analog window triggering

Bandwidth (large signal, to -3 dB)
AI <0..31>	600 kHz
APFI 0	3.9 MHz

Accuracy

±1% of range

APFI 0 characteristics
Input impedance	10 kΩ
Coupling	DC
Protection, power on	±30 V
Protection, power off	±15 V

AI Absolute Accuracy

Table 1. AI Absolute Accuracy
Nominal Range Positive Full Scale	Nominal Range Negative Full Scale	Residual Gain Error (ppm of Reading)	Offset Tempco (ppm of Range/°C)	Random Noise, σ (μVrms)	Absolute Accuracy at Full Scale (μV)
10	-10	115	2	265	3,225
5	-5	115	2	148	1,613
2	-2	117	2	74	650
1	-1	124	3	50	333

Note For more information about absolute accuracy at full scale, refer to the AI Absolute Accuracy Example section.

Gain tempco	16.7 ppm/°C
Reference tempco	5 ppm/°C
Residual offset error	12 ppm of range
INL error	126 ppm of range

Note Accuracies listed are warranted for up to one year from the device external calibration when the device is within 10 °C of the external calibration temperature and 1 °C of the last self calibration, when averaging 10,000 DC samples. Other accuracies may be calculated for different temperatures and sample sizes using the given equations.

Notice This product may become more sensitive to electromagnetic disturbances in the operational environment when test leads are attached or when connected to a test object.

AI Absolute Accuracy Equation

AbsoluteAccuracy = Reading · (GainError) + Range · (OffsetError) + NoiseUncertainty

GainError = ResidualGainError + GainTempco · (TempChangeFromLastInternalCal) + ReferenceTempco · (TempChangeFromLastExternalCal)
OffsetError = ResidualOffsetError + OffsetTempco · (TempChangeFromLastInternalCal) + INLError
NoiseUncertainty =
$\frac{Random Noise \cdot 3}{\sqrt{10, 000}}$
for a coverage factor of 3 σ and averaging 10,000 points.

AI Absolute Accuracy Example

Absolute accuracy at full scale on the analog input channels is determined using the following assumptions:

TempChangeFromLastExternalCal = 10 °C
TempChangeFromLastInternalCal = 1 °C
number_of_readings = 10,000
CoverageFactor = 3 σ

For example, on the 10 V range, the absolute accuracy at full scale is as follows:

GainError = 115 ppm + 16.7 ppm · 1 + 5 ppm · 10 = 181.7 ppm
OffsetError = 12 ppm + 2 ppm ·1 + 126 ppm = 140 ppm
Noise Uncertainty =
$\frac{265 μ V \cdot 3}{\sqrt{10, 000}}$
= 8 µV
AbsoluteAccuracy = 10 V · (GainError) + 10 V · (OffsetError) + NoiseUncertainty = 3225 µV

Analog Output

Number of channels

2

DAC resolution

16 bits

DNL

±1 LSB, maximum

Monotonicity

16 bit guaranteed

Accuracy

Refer to the AO Absolute Accuracy section.

Maximum update rate (simultaneous)
1 channel	900 kS/s
2 channels	840 kS/s

Minimum update rate

No minimum

Timing accuracy

50 ppm of sample rate

Timing resolution

10 ns

Output range

±10 V

Output coupling

DC

Output impedance

0.2 Ω

Output current drive

±5 mA

Overdrive protection

±15 V

Overdrive current

15 mA

Power-on state

±20 mV

Power-on/off glitch

2 V peak for 150 ms

Output FIFO size

8,191 samples shared among channels used

Data transfers

DMA (scatter-gather), programmed I/O

AO waveform modes

Non-periodic waveform, periodic waveform regeneration mode from onboard FIFO, periodic waveform regeneration from host buffer including dynamic update

Settling time, full-scale step, 15 ppm (1 LSB)

6 µs

Slew rate

15 V/µs

Glitch energy at midscale transition

100 mV · 2.6 µs

AO Absolute Accuracy

Accuracies listed are warranted for up to one year from the device external calibration when the device is within 10 °C of the external calibration temperature and 1 °C of the last self calibration.

Table 2. AO Absolute Accuracy
Nominal Range Positive Full Scale	Nominal Range Negative Full Scale	Residual Gain Error (ppm of Reading)	Gain Tempco (ppm/°C)	Reference Tempco (ppm/°C)	Residual Offset Error (ppm of Range)	Offset Tempco (ppm of Range/°C)	INL Error (ppm of Range)	Absolute Accuracy at Full Scale (μV)
10	-10	130	11.3	5	52	4.8	128	3,761

AO Absolute Accuracy Equation

AbsoluteAccuracy = OutputValue ⋅ (GainError) + Range ⋅ (OffsetError)

GainError = ResidualGainError + GainTempco ⋅ (TempChangeFromLastInternalCal) + ReferenceTempco ⋅ (TempChangeFromLastExternalCal)
OffsetError = ResidualOffsetError + OffsetTempco ⋅ (TempChangeFromLastInternalCal) + INLError

Digital I/O/PFI

Static Characteristics

Number of channels	24 total 8 (P0.<0..7>) 16 (PFI <0..7>/P1, PFI <8..15>/P2)
Ground reference	D GND
Direction control	Each terminal individually programmable as input or output
Pull-down resistor	50 kΩ, typical 20 kΩ, minimum
Input voltage protection	±20 V on up to two pins

Notice Stresses beyond those listed under the Input voltage protection specification may cause permanent damage to the device.

Waveform Characteristics (Port 0 Only)

Terminals used

Port 0 (P0.<0..7>)

Port/sample size

Up to 8 bits

Waveform generation (DO) FIFO

2,047 samples

Waveform acquisition (DI) FIFO

255 samples

DI Sample Clock frequency

0 to 1 MHz, system and bus activity dependent

DO Sample Clock frequency
Regenerate from FIFO	0 to 1 MHz
Streaming from memory	0 to 1 MHz, system and bus activity dependent

Data transfers

DMA (scatter-gather), programmed I/O

Digital line filter settings

160 ns, 10.24 μs, 5.12 ms, disable

PFI/Port 1/Port 2 Functionality

Functionality	Static digital input, static digital output, timing input, timing output
Timing output sources	Many AI, AO, counter, DI, DO timing signals
Debounce filter settings	90 ns, 5.12 µs, 2.56 ms, custom interval, disable; programmable high and low transitions; selectable per input

Recommended Operating Conditions

Input high voltage (V_IH)
Minimum	2.2 V
Maximum	5.25 V

Input low voltage (V_IL)
Minimum	0 V
Maximum	0.8 V

Output high current (I_OH)
P0.<0..7>	-24 mA, maximum
PFI <0..15>/P1/P2	-16 mA, maximum

Output low current (I_OL)
P0.<0..7>	24 mA, maximum
PFI <0..15>/P1/P2	16 mA, maximum

Digital I/O Characteristics

Positive-going threshold (VT+)	2.2 V, maximum
Negative-going threshold (VT-)	0.8 V, minimum
Delta VT hysteresis (VT+ - VT-)	0.2 V , minimum
I_IL input low current (V_IN = 0 V)	-10 μA, maximum
I_IH input high current (V_IN = 5 V)	250 μA, maximum

Figure 3. PFI <0..15>/P1/P2: I_OH versus V_OH

Figure 4. PFI <0..15>/P1/P2: I_OL versus V_OL

General-Purpose Counters

Number of counter/timers	4
Resolution	32 bits
Counter measurements	Edge counting, pulse, pulse width, semi-period, period, two-edge separation
Position measurements	X1, X2, X4 quadrature encoding with Channel Z reloading; two-pulse encoding
Output applications	Pulse, pulse train with dynamic updates, frequency division, equivalent time sampling
Internal base clocks	100 MHz, 20 MHz, 100 kHz
External base clock frequency	0 MHz to 25 MHz; 0 MHz to 100 MHz on PXIe_DSTAR<A,B>
Base clock accuracy	50 ppm
Inputs	Gate, Source, HW_Arm, Aux, A, B, Z, Up_Down, Sample Clock
Routing options for inputs	Any PFI, PXIe_DSTAR<A,B>, PXI_TRIG, PXI_STAR, analog trigger, many internal triggers
FIFO	127 samples per counter
Data transfers	Dedicated scatter-gather DMA controller for each counter/timer, programmed I/O

Frequency Generator

Number of channels	1
Base clocks	20 MHz, 10 MHz, 100 kHz
Divisors	1 to 16
Base clock accuracy	50 ppm

Output can be available on any PFI or PXI TRIG<0..7> terminal.

Phase-Locked Loop (PLL)

Number of PLLs

1

Table 3. Reference Clock Locking Frequencies
Reference Signal	PXI Express Locking Input Frequency (MHz)
PXIe_DSTAR<A,B>	10, 20, 100
PXI_STAR	10, 20
PXIe_CLK100	100
PXI_TRIG <0..7>	10, 20
PFI <0..15>	10, 20

Output of PLL

100 MHz Timebase; other signals derived from 100 MHz Timebase including 20 MHz and 100 kHz Timebases

External Digital Triggers

Source	Any PFI, PXIe_DSTAR<A,B>, PXI_TRIG, PXI_STAR
Polarity	Software-selectable for most signals
Analog input function	Start Trigger, Reference Trigger, Pause Trigger, Sample Clock, Convert Clock, Sample Clock Timebase
Analog output function	Start Trigger, Pause Trigger, Sample Clock, Sample Clock Timebase
Counter/timer functions	Gate, Source, HW_Arm, Aux, A, B, Z, Up_Down, Sample Clock
Digital waveform generation (DO) function	Start Trigger, Pause Trigger, Sample Clock, Sample Clock Timebase
Digital waveform acquisition (DI) function	Start Trigger, Reference Trigger, Pause Trigger, Sample Clock, Sample Clock Timebase

Device-to-Device Trigger Bus

Input source	PXI_TRIG <0..7>, PXI_STAR, PXIe_DSTAR<A,B>
Output destination	PXI_TRIG <0..7>, PXIe_DSTARC
Output selections	10 MHz Clock, frequency generator output; many internal signals
Debounce filter settings	90 ns, 5.12 μs, 2.56 ms, custom interval, disable; programmable high and low transitions; selectable per input

Bus Interface

Form factor	x1 PXI Express, specification v1.0 compliant
Slot compatibility	x1 and x4 PXI Express or PXI Express hybrid slots
DMA channels	8 (can be used for analog input, analog output, digital input, digital output, counter/timer 0, counter/timer 1, counter/timer 2, counter/timer 3)

All PXIe devices may be installed in PXI Express slots or PXI Express hybrid slots.

Power Requirements

Caution The protection provided by the PXIe-6349 can be impaired if it is used in a manner not described in the user documentation.

Attention La protection apportée par le PXIe-6349 risque d'être endommagée s'il est utilisé d'une autre façon que celle décrite dans la documentation utilisateur.

+3.3 V	2.1 W
+12 V	22.5 W

Current Limits

Notice Exceeding the current limits may cause unpredictable device behavior.

+5 V terminal (connector 0)

1 A, maximum

Note Connector 0 has a self-resetting fuse that opens when current exceeds this specification.

P0/PFI/P1/P2 and +5 V terminals combined

1.2 A, maximum

Physical Characteristics

PXIe printed circuit board dimensions

Standard 3U PXI

Weight

140 g (4.8 oz)

I/O connectors
PXIe module connector	68-Pos Right Angle Single Stack PCB-Mount VHDCI (Receptacle)
Cable connector	68-Pos Offset IDC Cable Connector (Plug) (SHC68-*)

Note For more information about the connectors used for DAQ devices, refer to the document, NI DAQ Device Custom Cables, Replacement Connectors, and Screws, by going to ni.com/info and entering the Info Code rdspmb.

Calibration

Recommended warm-up time	15 minutes
Calibration interval	1 year

Maximum Working Voltage

Maximum working voltage refers to the signal voltage plus the common-mode voltage.

Channel to earth

11 V, Measurement Category I

Caution Do not connect the PXIe-6349 to signals or use for measurements within Measurement Categories II, III, or IV.

Attention Ne connectez pas le PXIe-6349 à des signaux et ne l'utilisez pas pour effectuer des mesures dans les catégories de mesure II, III ou IV.

Measurement Category I is for measurements performed on circuits not directly connected to the electrical distribution system referred to as MAINS voltage. MAINS is a hazardous live electrical supply system that powers equipment. This category is for measurements of voltages from specially protected secondary circuits. Such voltage measurements include signal levels, special equipment, limited-energy parts of equipment, circuits powered by regulated low-voltage sources, and electronics.

Note Measurement Categories CAT I and CAT O are equivalent. These test and measurement circuits are for other circuits not intended for direct connection to the MAINS building installations of Measurement Categories CAT II, CAT III, or CAT IV.

Environmental Characteristics

Temperature and Humidity

Temperature
Operating	0 °C to 55 °C
Storage	-40 °C to 71 °C

Humidity
Operating	10% to 90% RH, noncondensing
Storage	5% to 95% RH, noncondensing

Pollution Degree

2

Maximum altitude

2,000 m (800 mbar) (at 25 °C ambient temperature)

Shock and Vibration

Random vibration
Operating	5 Hz to 500 Hz, 0.3 g RMS
Non-operating	5 Hz to 500 Hz, 2.4 g RMS

Operating shock

30 g, half-sine, 11 ms pulse

PXIe-6349 Pinout

Table 4. Default Counter/Timer Terminals
Counter/Timer Signal	Default PFI Terminal
CTR 0 SRC	PFI 8
CTR 0 GATE	PFI 9
CTR 0 AUX	PFI 10
CTR 0 OUT	PFI 12
CTR 0 A	PFI 8
CTR 0 Z	PFI 9
CTR 0 B	PFI 10
CTR 1 SRC	PFI 3
CTR 1 GATE	PFI 4
CTR 1 AUX	PFI 11
CTR 1 OUT	PFI 13
CTR 1 A	PFI 3
CTR 1 Z	PFI 4
CTR 1 B	PFI 11
CTR 2 SRC	PFI 0
CTR 2 GATE	PFI 1
CTR 2 AUX	PFI 2
CTR 2 OUT	PFI 14
CTR 2 A	PFI 0
CTR 2 Z	PFI 1
CTR 2 B	PFI 2
CTR 3 SRC	PFI 5
CTR 3 GATE	PFI 6
CTR 3 AUX	PFI 7
CTR 3 OUT	PFI 15
CTR 3 A	PFI 5
CTR 3 Z	PFI 6
CTR 3 B	PFI 7
FREQ OUT	PFI 14

Table 5. Signal Descriptions
Signal	Reference	Description
AI GND	—	Analog Input Ground—These terminals are the bias current return point for DIFF measurements. All ground references—AI GND, AO GND, and D GND—are connected on the device. Though AI GND, AO GND, and D GND are connected on the device, they are connected by small traces to reduce crosstalk between subsystems. Each ground has a slight difference in potential.
AI <0..31>	AI GND	Analog Input Channels—AI 0+ and AI 0- are the positive and negative inputs of differential analog input channel 0.
AO <0,1>	AO GND	Analog Output Channels—These terminals supply voltage output.
AO GND	—	Analog Output Ground—AO GND is the reference for AO. All ground references—AI GND, AO GND, and D GND—are connected on the device. Though AI GND, AO GND, and D GND are connected on the device, they are connected by small traces to reduce crosstalk between subsystems. Each ground has a slight difference in potential.
D GND	—	Digital Ground—D GND supplies the reference for port 0, port 1, port 2 digital channels, PFI, and +5 V. All ground references—AI GND, AO GND, and D GND—are connected on the device. Though AI GND, AO GND, and D GND are connected on the device, they are connected by small traces to reduce crosstalk between subsystems. Each ground has a slight difference in potential.
P0.<0..7>	D GND	Port 0 Digital I/O Channels—You can configure each signal individually as an input or output.
APFI 0	AI GND	Analog Programmable Function Interface Channel—The APFI signal can be used as an analog trigger input. APFI 0 is referenced to AI GND when it is used as an analog trigger input.
+5 V	D GND	+5 V Power Source—These terminals provide a fused +5 V power source.
PFI <0..7>/P1.<0..7>, PFI <8..15>/P2.<0..7>	D GND	Programmable Function Interface or Digital I/O Channels—Each of these terminals can be individually configured as a PFI terminal or a digital I/O terminal. As an input, each PFI terminal can be used to supply an external source for AI, AO, DI, and DO timing signals or counter/timer inputs. As a PFI output, you can route many different internal AI, AO, DI, or DO timing signals to each PFI terminal. You can also route the counter/timer outputs to each PFI terminal. As a port 1 or port 2 digital I/O signal, you can individually configure each signal as an input or output.
Reserved	—	Reserved Pin—May be connected internally to device. Should never be connected to any signal.