¹ Single-ended output available on main path only.

² Applies to differential, common-mode, and single-ended offsets.

³ For all configurations, both CH± terminals are terminated to ground through loads of the same value.

The voltage output levels are set in the software and are based on a 50 Ω per line load termination to ground (the default) or based on the user-specified load resistance. Common-mode offset assumes output terminals are terminated into equal loads to ground. Gain values in NI-FGEN correspond to V_pk, which is half the amplitude in V_pk-pk.

Combinations of waveform data, offset, and gain that exceed a single-ended output of 3.2 V_pk may result in waveform clipping.

⁴ Amplitude values assume the full scale of the DAC is used. If an amplitude smaller than the minimum value is desired, you can use waveforms less than the full scale of the DAC, or you can use digital gain. Additional offset can be added using waveform data.

⁵ Measured on CH+. V_pk on each terminal is equal to Analog Offset + Waveform Data * Gain.

⁶ Measured as differential peak-to-peak signal amplitude (V_pk-pk). Each terminal V_pk-pk is half of the differential V_pk-pk. V_pk on each terminal is equal to Differential Offset * 0.5 + Common-Mode Offset + Waveform Data × Gain/2.

⁷ Both CH 0+/- or CH 1+/- terminals are terminated to ground through loads of the same value. Single-ended values are half of differential values.

⁸ For the Main path, V_CM +V_DIFF/2 and V_CM – V_DIFF/2 is between ±2 V, into an open load.

For all configurations, both CH± terminals are terminated to ground through loads of the same value.

The voltage output levels are set in the software and are based on a 50 Ω per line load termination to ground (the default) or based on the user-specified load resistance. Common-mode offset assumes output terminals are terminated into equal loads to ground.

⁹ Both CH 0+/– or CH 1+/– terminals are terminated to ground through loads of the same value. Offset is any combination of common-mode offset voltage and differential offset voltage.

¹⁰ Additional offset can be added using waveform data.

¹¹ Combinations of waveform data, offset, and gain that exceed a single-ended peak output voltage of 3.2 V may result in waveform clipping.

¹² ±5 °C of self-calibration temperature. Alignment can be improved with manual adjustment by using Sample Clock Delay.

¹³ Measured with a DMM. Measured with both output terminals terminated to ground through a high impedance. For the differential direct path, differential offset is not adjusted during self-calibration.

¹⁴ For DC accuracy, single-ended output range is defined as 2x the gain setting into high impedance. For example, the accuracy of a DC signal with a gain of 2.5, a load impedance of 1 GΩ, and a single-ended output range of 5 V is calculated using the following equations:

Gain error within ±5 °C of self-cal temperature: ±(0.4% * 5 V + 0.5 mV) = ±20.5 mV

Gain error at +10 °C of self-cal temperature: ±20.5 mV - 0.05% * 5 °C * (5 V) = +8 mV/-33 mV

Offset error: [2 V Offset at Gain = 2.5 ] ±(0.15% * (2 V) + 0.04% * (5 V) + 1.25 mV) = ±6 .25 mV

¹⁵ For DC accuracy, differential output range is defined as 2x the gain setting into high impedance. For example, the accuracy of a DC signal with a gain of 5, a load impedance of 1 GΩ, and a differential output range of 10 V is calculated using the following equations:

Gain error within ±5 °C of self-cal temperature: ±(0.6% * 10 V + 1 mV) = ±61 mV

Gain error at +10 °C of self-cal temperature: ±61 mV - 0.05% * 5 °C * (10 V) = +36 mV/-86 mV

Differential offset error: [Requested Differential Offset = 1 V at Gain = 5] ±(0.3% * (1 V) + 0.01% * (10 V) + 2 mV) = ±6 mV

¹⁶ Direct path common-mode offset is minimized through active circuitry. Applying an external nonzero common-mode offset to the output terminal is not recommended; however, the common-mode circuitry can sink or source up to 5 mA of common-mode bias current. Terminate both output terminals to ground through the same impedance. If the output terminals are not terminated to ground, the maximum termination voltage is 250 mV through 50 Ω.

¹⁷ Within ±5 °C of self-calibration temperature. Measured using a DMM, with full-scale data into high impedance, 50 kHz sine wave, 400 MS/s. The output range defined in DC Accuracy must be converted to V_RMS by dividing by (2√2).

¹⁸ Both output terminals must be terminated with the same impedance to ground.

¹⁹ The voltage output levels are set in the software and are based on a 50 Ω per line load termination to ground (the default) or based on the user-specified load resistance. Common-mode offset assumes output terminals are terminated into equal loads to ground.

²⁰ Both CH 0+/– or CH 1+/– terminals are terminated to ground through loads of the same value.

²¹ Clipping may occur if the summed voltage is outside the maximum voltage range.

²² –3 dB, 400 MS/s. Includes DAC sinc response. Flatness correction disabled.

²³ Flatness correction is not supported if the filter is disabled.

²⁴ For channel-to-channel passband flatness matching disabled: With respect to 50 kHz into 100 Ω differential load, 400 MS/s. Flatness correction corrects for analog frequency response and DAC sinc response up to 0.3375 × sample rate. Receiver return loss may degrade flatness. For channel-to-channel passband flatness matching enabled: With respect to 50 kHz on each channel, 400 MS/s. Load variations may degrade performance. Refer to the AC Amplitude Accuracy Main Path specification for the correct terminal configuration for the 50 kHz reference accuracy.

²⁵ For channel-to-channel passband flatness matching disabled: With respect to 50 kHz into 100 Ω differential load, 400 MS/s. Flatness correction corrects for analog frequency response and DAC sinc response up to 0.3 × sample rate. Receiver return loss may degrade flatness. For channel-to-channel passband flatness matching enabled: With respect to 50 kHz on each channel, 400 MS/s. Load variations may degrade performance. Refer to the AC Amplitude Accuracy Direct Path specification for the correct terminal configuration for the 50 kHz reference accuracy.

²⁶ Valid for use without OSP enabled or when interpolating by 2× with OSP enabled. For all larger interpolation rates using OSP, the OSP filters may introduce extra ripple. Refer to Digital Performance for more information about OSP filter ripple.

²⁷

Frequency ranges with flatness correction enabled are sample rate dependent. The 60 MHz frequency is defined by the 0 MHz to 60 MHz Passband Flatness specification. Value = Min (0.3375 × Sample Rate, 60 MHz)

²⁸ Value = 0.3375 × Sample Rate

²⁹ 400 MS/s, amplitude -1 dBFS. Includes aliased harmonics. Differential output measured single-ended with a balun, or differential amp. Terminated into 50 Ω to ground on each terminal.

³⁰

400 MS/s sample rate, amplitude -1 dBFS. Measured from DC to 200 MHz. All values include aliased harmonics. Differential output measured single-ended with balun.

For cells with two values, the first specification listed is for a 10.0 MHz sinusoid at a 400 MS/s sample rate (waveform contains 40 unique samples), and the specification in parentheses is for a 10.0 MHz sinusoid at a 399.9 MS/s sample rate (waveform contains over 3,000 unique samples with unique DAC codes). Long, non-repetitive waveforms like modulated signals offer better spurious performance. For periodic waveforms represented by a small number of unique samples, DAC nonlinearities limit dynamic specifications.

³¹ Terminated into 50 Ω to ground on each terminal.

³² Generating full-scale sine wave at frequency listed, 400 MS/s. Measured 200 MHz to 2 GHz. Anti-imaging filter is fixed and optimized for 400 MS/s.

³³ Measured single ended at the victim channel, 0 V DC output, 400 MS/s sample rate. Aggressor channel is terminated into 50 Ω, sine wave output, 400 MS/s sample rate.

³⁴ The dBc values are referenced to the differential tone power on the aggressor channel. Results are independent of victim and aggressor filter configurations, terminal configurations, and victim channel output amplitude.

³⁵ Amplitude –1 dBFS. Includes the 2nd through the 6th harmonic. Measured at 0.1 MHz offset. 400 MS/s sample rate. Differential Main path output measured single ended with a balun.

³⁶ The waveform or digital amplitude for each tone is -7 dBFS. 400 MS/s sample rate. Two-tone frequencies are frequency ±100 kHz.

³⁷ Differential Direct path output measured single-ended with balun.

³⁸ Average noise density from DC to 200 MHz generating –40 dBFS, 1 MHz sine wave at 400 MS/s. Differential output measured with a balun. Differential dBm numbers referred back to a 50 Ω system.

³⁹ Specifications valid for both main path and direct path, limited by the output noise floor.

Generating sine wave at an output frequency of 400 MS/s.

⁴⁰ System output jitter integrated from 100 Hz to 100 kHz.

⁴¹ The Direct path is optimized for frequency-domain performance.

⁴² Filter disabled.

⁴³ Aberrations on pulsed waveforms are due to the analog reconstruction filter and can be significantly reduced if waveform data has limited slew rate. Waveforms with higher slew rates are not recommended.

⁴⁴ Values into 50 Ω at each output.

⁴⁵ Values into 50 Ω at each output.

⁴⁶ Filter disabled.

⁴⁷ Aberrations on pulsed waveforms are due to the analog reconstruction filter and can be significantly reduced if waveform data has limited slew rate. Waveforms with higher slew rates are not recommended.

⁴⁸ 7% aberrations achievable with 133 V/μs slew rate limiting on waveform data. Pulsed waveforms should contain multiple data points per rising or falling edge, regardless of DAC rate or signal frequency.

⁴⁹ Varies with Sample clock frequency. Specification is worst-case.

⁵⁰ Set in software with the Channel Delay property or the NIFGEN_ATTR_CHANNEL_DELAY attribute.

⁵¹ Set in software with the Channel Delay property or the NIFGEN_ATTR_CHANNEL_DELAY attribute.

⁵² Default of 10 MHz. ±0.01% accuracy required.

⁵³ Measured without an external Reference clock. When locking to a Reference clock, frequency accuracy is solely dependent on the frequency accuracy of the Reference clock source.

⁵⁴ With optional divider.

⁵⁵ With optional divider.

⁵⁶ Not applicable for all destinations. Refer to the specifications for your clocking configuration for applicable ranges.

⁵⁷ The maximum value of the divisor, K, is sample rate dependent.

⁵⁸ The maximum value of the Sample clock divisor, K, is sample rate dependent.

⁵⁹ Output drivers are +3.3 V TTL/CMOS compatible up to 200 MHz.

⁶⁰ Load of 10 pF.

⁶¹ There are two data markers per channel

⁶² Memory is shared between both channels.

⁶³ The minimum waveform size is sample rate dependent. Measured using a 200 MHz trigger.

⁶⁴ The minimum waveform size is sample rate dependent.

⁶⁵ All trigger modes except where noted.

⁶⁶ Condition: One or two segments in a sequence.

⁶⁷ Condition: One or two segments in a sequence.

⁶⁸ Condition: Waveform size is <4,000 samples.

⁶⁹ Single Trigger mode. Play times can be significantly extended by using Continuous, Stepped, or Burst Trigger modes.

⁷⁰ For example, for a Sample clock rate of 400 MS/s, I/Q rate range = 12.2 kS/s to 200 MS/s.

⁷¹ Data Processing Mode describes the OSP engine data source. The data can be a single stream of real data (Real), or separate streams of real and imaginary data (Complex).

⁷² OSP Mode describes the signal processing function performed on the data after interpolation. In IF Mode, I and Q data streams are quadrature upconverted to an intermediate frequency in a single output stream (to DAC 0/I). In Baseband Mode, frequency shifting can be applied to the I and Q data streams before they go into separate output streams (DAC 0/I and DAC 1/Q).

⁷³ Unitless

⁷⁴ Applied after prefilter gain.

⁷⁵ Overflows occur when |Output| > 1.

⁷⁶ Lowpass filter that minimizes ripple to: I/Q rate × Passband.

⁷⁷ When using pulse shaping, these filters require an OSP interpolation factor of 24 or greater.

⁷⁸ When using pulse shaping, these filters require an OSP interpolation factor of 24 or greater.

⁷⁹ For example, 1.42 μHz with a sample rate of 400 MS/s.

⁸⁰ Software- and system-dependent.

⁸¹ Full-scale output.

⁸² Passband from 0 to (0.4 × I/Q Rate). Ripple is dependent upon the interpolation rate.

⁸³ Stopband suppression from (0.6 × I/Q rate).

⁸⁴ Values were derived using a single-ended Main path, -1 dBFS, Flatness Correction Enabled, Onboard Sample Clock without Reference. The number of Symbols was 1,024. All measurements were made using the PXIe-5622, not phase-locked to the PXIe-5451, equalization enabled, 40 MHz IF and 110 MHz IF using internal clocking, 70 MHz IF using external clocking at 100 MHz.

⁸⁵ Fractional interpolation performed on data before generation.

⁸⁶ Fractional interpolation performed on data before generation.