PXIe-5450 Specifications

These specifications apply to the 128 MB and 512 MBPXIe-5450.

Caution The outputs of this sensitive test and measurement product are not protected for electromagnetic interference for functional reasons. As a result, this product may experience reduced accuracy or other temporary performance degradation when cables are attached in an environment with electromagnetic interference present.

Definitions

Warranted specifications describe the performance of a model under stated operating conditions and are covered by the model warranty.

Characteristics describe values that are relevant to the use of the model under stated operating conditions but are not covered by the model warranty.

  • Typical specifications describe the performance met by a majority of models.
  • Nominal specifications describe an attribute that is based on design, conformance testing, or supplemental testing.

Specifications are Nominal unless otherwise noted.

Conditions

Specifications are valid under the following conditions unless otherwise noted.

  • Signals terminated with 50 Ω to ground
  • Direct path set to 0.5 Vpk differential (gain = 0.5, 1 Vpk-pk differential)
  • Sample clock set to 400 MS/s
  • Onboard Sample clock with no Reference clock
  • 0 °C to 55 °C ambient temperature

Warranted specifications are valid under the following conditions unless otherwise noted.

  • 15 minutes warm-up time at ambient temperature
  • Calibration cycle maintained
  • Chassis fan speed set to High
  • NI-FGEN instrument driver used
  • NI-FGEN instrument driver self-calibration performed after instrument is stable

Typical specifications are valid under the following conditions unless otherwise noted:

  • Over ambient temperature ranges of 23 ±5 °C with a 90% confidence level, based on measurements taken during development or production

Analog Outputs

CH 0+/–, CH 1+/– (Analog Outputs, Front Panel Connectors)

Number of channels

2

Output type

Differential

Output paths

Direct path

DAC resolution

16 bits

Amplitude and Offset

Amplitude resolution

4 digits, <0.0025% (0.0002 dB of amplitude range)

Table 1. Differential Full Scale Amplitude Range[1]
Flatness Correction State Load Amplitude (Vpk-pk)[2]
Minimum Value Maximum Value
Disabled 50 Ω 0.708 1.00
1 kΩ 1.35 1.90
Open 1.42 2.00
Enabled 50 Ω 0.567 0.8
1 kΩ 1.08 1.52
Open 1.14 1.6

Accuracy

Accuracy

DC Accuracy Measured with a DMM. Differential offset is not adjusted during self-calibration. Measured with both output terminals terminated to ground through a high impedance.
Absolute gain error

Within ±5 °C of Self-Cal temperature

±0.2% of differential output range[3]

Outside ±5 °C of Self-Cal temperature

+ 0.030%/°C

+ 0.015%/°C, typical

Absolute Differential Offset

±1 mV (0 °C to 55 °C)

Absolute common mode offset[4]

±350 µV (0 °C to 55 °C)

Channel-to-channel relative gain error

Within ±5 °C of Self-Cal temperature

±0.08% of differential output range[3]

Outside ±5 °C of Self-Cal temperature

+ 0.010%/°C

+ 0.005%/°C, typical

AC Amplitude Accuracy Measured using a DMM, with full-scale data into highimpedance, 50 kHz sine wave, 400 MS/s.
Absolute AC amplitude accuracy

within ±5 °C of Self-Cal temperature

±0.5% of differential output range

Channel-to-Channel, relative AC amplitude accuracy

within ±5 °C of Self-Cal temperature

±0.2% of differential output range

±0.07% of differential output range, typical

Channel-to-channel timing alignment accuracy[5]

35 ps

25 ps, typical

Output Characteristics

Output impedance

50 Ω nominal, per connector[6]

Return loss (differential), nominal
Single-ended direct path

5 MHz to 60 MHz

26 dB

60 MHz to 145 MHz

15 dB

Differential direct path

Up to 20 MHz

35 dB

Up to 60 MHz

22 dB

Up to 145 MHz

12 dB

Load impedance compensation

Output amplitude is compensated for user-specified load impedance to ground. Performed in software.

Output coupling

DC

Output enable

Software-selectable. When disabled, output is terminated with a 50 Ω, 1 W resistor.

Maximum output overload[7]

±8 V from a 50 Ω source

Waveform summing

The output terminals support waveform summing, which means the outputs of multiple PXIe-5450 signal generators can be connected together.[8]

Frequency Response

Analog bandwidth, typical[9]

Baseband

145 MHz for each I and Q output

Complex baseband

290 MHz when used with external I/Q modulator

Analog filter

4-pole filter for image suppression

Table 2. Passband Flatness[10][13],[11]
Passband Flatness Flatness Correction Disabled Flatness Correction Enabled[12],[13]
0 MHz to 60 MHz [13],[14] 0.5 dB, typical 0.24 dB

0.13 dB, typical

60 MHz [13] , [14] to 120 MHz [13],[15] 1.9 dB, typical 0.34 dB

0.19 dB, typical

Table 3. Passband Flatness[16]
Passband Flatness Flatness Correction Disabled Flatness Correction Enabled[12],[13]
Channel-to-Channel Passband Flatness Matching 0 MHz to 60 MHz [13],[14] 0.05 dB, typical 0.03 dB, typical
Channel-to-Channel Passband Flatness Matching 60 MHz[13],[14] to 120 MHz [13],[15] 0.18 dB, typical 0.04 dB, typical
Figure 1. Amplitude Response with Flatness Correction Enabled, 400 MS/s, Differential, Referenced to 50 kHz, Typical

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Figure 2. Amplitude Response, Flatness Correction Enabled, 400 MS/s, Differential, Referenced to 50 kHz, Typical

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Figure 3. Characteristic Frequency Response of Image Suppression Filter, Typical

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Note Sinc response due to DAC sampling is not included in the previous figure.

Spectral Characteristics

Table 4. Nominal Spurious Free Dynamic Range (SFDR) at 1 MHz [17]
Frequency Range SFDR Without Harmonics (dB) SFDR With Harmonics (dB)
DC to 7 MHz 98 88
DC to 200 MHz 84 75
Table 5. SFDR with Harmonics [18]
Frequency (MHz) SFDR (dB)
10 70 (74)[19]
60 68 (70)[19]
100 62
120 62
160 62
Table 6. SFDR without Harmonics [20]
Frequency (MHz) SFDR (dB)
10 70 (74)[19]
60 68 (73)[19]
100 64
120 62
160 62
Table 7. Out-of-Band Performance, Nominal[21]
In-Band Tone Frequency (MHz) Out of Band Spur Level (dBm)
0 to 20 <–80 dBm
20 to 50 <–65 dBm
Channel-to-Channel Crosstalk

0 MHz to 200 MHz

<80 dBc, nominal

0 MHz to 150 MHz

<90 dBc, nominal

Table 8. Total Harmonic Distortion (THD), Typical[22]
Frequency (MHz) THD (dBc)
10 -75
20 -70
40 -68
80 -68
100 -68
120 -78
160 -83
Table 9. Intermodulation Distortion (IMD3), Typical[23]
Frequency (MHz) IMD (dBc)
10 -84
20 -81
40 -75
80 -71
100 -68
120 -68
160 -66
Table 10. Average Noise Density [24]
Amplitude Range Average Noise Density
Vpk-pk dBm 1378 dBm/Hz dBFS/Hz
1 4.0 2.24 -160 -164
Figure 4. Total Harmonic Distortion, Typical

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Figure 5. Intermodulation Distortion, 200 kHz Separation, Typical

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Figure 6. Intermodulation Distortion, 1 MHz Separation, 20 MHz Tone, 400 MS/s, – 7 dBFS, Typical

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Figure 7. 10.000 MHz Single-Tone Spectrum, 400 MS/s, –1 dBFS, Typical

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Figure 8. 10.100 MHz Single-Tone Spectrum, 400 MS/s, –1 dBFS, Typical

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Output Phase Noise and Jitter

Table 11. Output Phase Noise and Jitter[25], Typical
Sample Clock Source Output Freq. (MHz) System Phase Noise Density[26] (dBc/Hz) System Output Integrated Jitter[26]
100 Hz 1 kHz 10 kHz 100 kHz 1 MHz
Internal, High Resolution Clock, 400 MS/s 10 <-121 <-137 <-146 <-152 <-153 <350 fs
100 <-101 <-119 <-126 <-136 <-141 <350 fs
CLK IN External 10 MHz Reference Clock,400 MS/s 10 <-122 <-135 <-146 <-152 <-153 <350 fs
100 <-105 <-115 <-126 <-136 <-141 <350 fs
Figure 9. Phase Noise on a Representative Module, 100 MHz Sine Wave, 400 MS/s Internal Clock Sample Rate, Chassis Fans Low, Shown With and Without a Reference Clock

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Figure 10. Phase Noise on a Representative Module, 100 MHz Sine Wave, 400 MS/s Internal Clock Sample Rate, Chassis Fans High, No Reference Clock

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Suggested Maximum Frequencies for Common Functions[27]

Sine

145 MHz

Square

33 MHz(<133 V/µs slew rate)[28]

Ramp

1 MHz(<50 V/µs slew rate)[28]

Triangle

8 MHz

Pulse Response, Typical

Typical Rise/Fall Time (10% to 90%)[29]

Flatness correction disabled

3 ns

Flatness correction enabled

2.5 ns

Aberration[29]

Flatness correction disabled

18% (7%)[30]

Flatness correction enabled

22%

Clocking

Onboard Sample Clock

Sample clock rate range

12.2 kS/s to 400 MS/s

Sample clock rate frequency resolution

<5.7 μHz[31]

Sample clock delay

0 ns to 2 ns, independent per channel[32]

Sample clock delay resolution

10 ps nominal

Sample clock timebase phase adjust

±1 Sample clock timebase period

Reference Clock Sources

None (internal reference)

PXI_CLK10 (backplane)

CLK IN (front panel connector)

Reference Clock Frequency[33]

1 MHz to 100 MHz in increments of 1 MHz

100 MHz to 200 MHz in increments of 2 MHz

200 MHz to 400 MHz in increments of 4 MHz

Default of 10 MHz

Internal Reference Clock Frequency Accuracy[34]

±0.01%

External Sample Clock

External Sample clock source

CLK IN front panel connector, with multiplication and division

External Sample clock rate

10 MS/s, 20 MS/s to 400 MS/s

Sample Clock rate range

12.2 kS/s to 400 MS/s

Multiplication/Division factor range

Varies depending on the external Sample clock rate

External Sample clock delay

0 ns to 2 ns, independent per channel[35]

External Sample clock delay resolution

10 ps, nominal

External Sample clock timebase phase adjust

±1 Sample clock timebase period

External Sample Clock Timebase

External Sample clock timebase sources

CLK IN front panel connector, with division

External Sample clock timebase rate range

200 MS/s to 400 MS/s

Divide factor range

1, 2 to 32768 in steps of 2

Sample Clock delay

0 ns to 2 ns, independent per channel

Sample Clock delay resolution

10 ps nominal

Exporting Clocks

Table 12. Exported Clock Rates
Clock Destination Rates
Reference Clock CLK OUT 1 MHz to 400 MHz
PFI<0..1> 1 MHz to 200 MHz
Sample Clock[36] CLK OUT 100 kHz to 400 MHz
PFI<0..1> 0 MHz to 200 MHz
Sample Clock Timebase[37] CLK OUT 100 kHz to 400 MHz
PFI<0..1> 0 MHz to 200 MHz

Terminals

CLK IN (Sample Clock and Reference Clock Input, Front Panel Connector)

Direction

Input

Destinations

Reference clock, Sample clock, or Sample clock timebase

Frequency range

1 MHz to 400 MHz[38]

Input impedance

50 Ω , nominal

Input voltage range

50% duty cycle input

500 mVpk-pk to 5 Vpk-pk into 50 Ω (–2 dBm to +18 dBm)

45% to 55% duty cycle input

550 mVpk-pk to 4.5 Vpk-pk into 50 Ω (–1.2 dBm to +17 dBm)

Input protection range

50% duty cycle input

6 Vpk-pk into 50 Ω (19.5 dBm)

45% to 55% duty cycle input

5.4 Vpk-pk into 50 Ω (18.5 dBm)

Duty cycle requirements

45% to 55%

Input coupling

AC

Voltage standing wave ratio (VSWR)

1.3:1 up to 2 GHz, nominal

CLK OUT (Sample Clock and Reference Clock Output, Front Panel Connector)

Direction

Output

Sources

Sample clock, divided by integer K (1≤ K ≤ 3, minimum[39]), Reference clock, or Sample clock timebase, divided by integer M (1 ≤ M ≤ 1048576)

Frequency Range

100 kHz to 400 MHz

Output Voltage

≥0.7 Vpk-pk into 50 Ω typical

Maximum Output Overload

3.3 Vpk-pk from a 50 Ω source

Output Coupling

AC

VSWR

1.3:1 up to 2 GHz nominal

PFI 0 and PFI 1 (Programmable Function Interface, Front Panel Connectors)

Direction

Bidirectional

Frequency Range

DC to 200 MHz

As an Input (Trigger)

Destinations

Start trigger, Script trigger

Input Range

0 V to 5 V

Input Protection Range

-2 V to +6.5 V

Input voltage

VIH

1.8 V

VIL

1.5 V

Input Impedance

10 kΩ , nominal

As an Output (Event)

Sources

Sample clock divided by integer K (2 ≤ K ≤ 3, minimum[40]), Sample clock timebase divided by integer M (2 ≤ M ≤ 1048576), Reference clock, Marker event, Data marker event, Exported Start trigger, Exported Script trigger, Ready for Start event, Started event, or Done event

Output impedance

50 Ω , nominal

Maximum Output Overload

–2 V to +6.5 V

Output voltage[41]

Minimum VOH

2.4 V (Open load)

1.3 V (50 Ω load)

Maximum VOL

0.4 V (Open load)

0.2 V (50 Ω load)

Rise/Fall Time[42]

3 ns, typical

Triggers and Events

Triggers

Sources

PFI<0..1> (SMB front panel connectors)

PXI_Trig<0..7> (backplane connector)

Immediate (does not wait for a trigger). Default.

Types

Start trigger edge, Script trigger edge and level, Software trigger

Edge detection

Rise, falling

Minimum pulse width

25 ns

Delay from trigger to analog output with OSP disabled

154 Sample clock timebase periods + 65 ns, nominal

Additional delay with OSP enabled

Varies with OSP configuration

Trigger exporting

Exported Trigger Destinations

PFI<0..1> (SMB front panel connectors) or PXI_Trig<0..6> (backplane connector)

Exported Trigger Delay

50 ns, nominal

Exported Trigger Pulse Width

>150 ns

Events

Destinations

PFI<0..1> (SMB front panel connectors)

PXI_Trig<0..6> (backplane connector)

Types

Marker<0..3>, Data Marker<0..1>[43], Ready for Start, Started, Done

Quantum

Marker position must be placed at an integer multiple of two samples.

Width

Adjustable, minimum of 2 samples. Default is 150 ns.

Skew, with respect to analog output

PFI<0..1>

±3 Sample clock periods

PXI_Trig<0..6>

±6 Sample clock periods

Waveform Generation Capabilities

Memory Usage

The PXIe-5450 uses the Synchronization and Memory Core (SMC) technology in which waveforms and instructions share onboard memory. Parameters, such as number of segments in sequence list, maximum number of waveforms in memory, and number of samples available for waveform storage, are flexible and user defined.

Onboard Memory Size[44]

128 MB option

134,217,728 bytes

512 MB option

536,870,912 bytes

Loop Count

1 to 16,777,215

Burst trigger: Unlimited

Quantum

Waveform size must be an integer multiple of two samples.

Output modes

Arbitrary Waveform, Script, and Arbitrary Sequence

Table 13. Minimum Waveform Size (Samples)[45]
Trigger Mode Number of Channels Arbitrary Waveform Mode Arbitrary Sequence Mode >180 MS/s Arbitrary Sequence Mode ≤180MS/s
Single 1 4 2 2
2 4 4 4
Continuous 1 142 140 58
2 284 280 116
Stepped 1 210 154 54
2 420 308 108
Burst 1 142 1,134 476
2 284 2,312 952
Table 14. Memory Limits (Bytes)
Generation Mode Number of Channels 128 MB 512 MB
Arbitrary Waveform Mode, Maximum Waveform Memory[46] 1 67,108,352 268,434,944
2 33,553,920 134,217,216
Arbitrary Sequence Mode, Maximum Waveform Memory[47] 1 67,108,352 268,434,944
2 33,553,920 134,217,216
Arbitrary Sequence Mode, Maximum Waveforms[48] 1 1,048,575 4,194,303
2 524,287 2,097,151
Arbitrary Sequence Mode, Maximum Segments in a Sequence[49] 1 8,388,597 33,554,421
2 4,194,293 16,777,205
Table 15. Maximum Waveform Play Times[50]
Sample Rate Number of Channels 128 MB 512 MB
400 MS/s 1 0.17 seconds 0.67 seconds
2 0.084 seconds 0.34 seconds
25 MS/s 1 2.68 seconds 10.74 seconds
2 1.34 seconds 5.37 seconds
100 kS/s 1 11 minutes 11 seconds 44 minutes 44 seconds
2 5 minutes 35 seconds 22 minutes 22 seconds

Onboard Signal Processing

I/Q Rate

OSP interpolation range

2, 4, 8, 12, 16, 20

24 to 8,192 (multiples of 8)

8,192 to 16,384 (multiples of 16)

16,384 to 32,768 (multiples of 32)

I/Q rate[51]

(Sample Clock rate) ÷ (OSP interpolation)

Bandwith[52]

0.4 * I/Q rate, per output

Data processing modes

Real (I path only) or Complex (I/Q)

OSP mode

Baseband

Prefilter Gain and Offset

Prefilter Gain and Offset Resolution

21 bits

Prefilter Gain Range

–16.0 to +16.0 (|Values| < 1 attenuate user data)[53]

Prefilter Offset Range

–1.0 to +1.0[54]

Prefilter Output

(User data × Prefilter gain) + Prefilter offset[55]

Finite Impulse Response (FIR) Filtering

Table 16. FIR Parameters by Filter Type
Filter Types Parameter Minimum Maximum
Flat[56] Passband 0.4 0.4
Raised cosine[57] Alpha 0.1 0.4
Root raised cosine[58] Alpha 0.1 0.4

Numerically Controlled Oscillator (NCO)

Maximum Frequency[59]

0.4 * sample rate

Frequency Resolution[60]

Sample rate/248

Tuning Speed[61]

250 μs, typical

Digital Performance

Maximum NCO Spur

<-90 dBc [62]

Interpolating Flat Filter Passband Ripple

<0.1 dB [63]

Interpolating Flat Filter Out-of-Band Suppression

>80 dB [64]

Calibration

External Calibration

The external calibration calibrates the ADC voltage reference and passband flatness. Appropriate constants are stored in nonvolatile memory.

Self-Calibration

An onboard, 24-bit ADC and precision voltage reference are used to calibrate the DC gain and offset. Onboard channel alignment circuitry is used to calibrate the skew between channels. The self-calibration is initiated by the user through the software and takes approximately 60 seconds to complete. Appropriate constants are stored in nonvolatile memory.

Calibration Interval

Specifications valid within 1 year of external calibration

Warm-up Time

15 minutes

Power

+3.3 VDC

Typical

1.9 A

Maximum

2.0 A

+12 VDC

Typical

2.2 A

Maximum

2.5 A

Total power

Typical

32.7 W

Maximum

36.6 W

Physical

Dimensions

3U, two-slot, PXI Express module

21.6 cm × 4.0 cm × 13.0 cm (8.5 in. × 1.6 in. × 5.1 in.)

Weight

476 g (17 oz)

Environment

Maximum altitude

2,000 m (800 mbar) (at 25 °C ambient temperature)

Pollution Degree

2

Indoor use only.

Operating Environment

Ambient temperature range

0 °C to 55 °C

Relative humidity range

10% to 90%, noncondensing

Storage Environment

Ambient temperature range

-25 °C to 85 °C

Relative humidity range

5% to 95%, noncondensing

Shock and Vibration

Operating shock

30 g peak, half-sine, 11 ms pulse

Random vibration

Operating

5 Hz to 500 Hz, 0.3 grms

Nonoperating

5 Hz to 500 Hz, 2.4 grms

Compliance and Certifications

Safety Compliance Standards

This product is designed to meet the requirements of the following electrical equipment safety standards for measurement, control, and laboratory use:

  • IEC 61010-1, EN 61010-1
  • UL 61010-1, CSA C22.2 No. 61010-1
Note For safety certifications, refer to the product label or the Product Certifications and Declarations section.

Electromagnetic Compatibility

This product meets the requirements of the following EMC standards for electrical equipment for measurement, control, and laboratory use:
  • EN 61326-1 (IEC 61326-1): Class A emissions; Basic immunity
  • EN 55011 (CISPR 11): Group 1, Class A emissions
  • EN 55022 (CISPR 22): Class A emissions
  • EN 55024 (CISPR 24): Immunity
  • AS/NZS CISPR 11: Group 1, Class A emissions
  • AS/NZS CISPR 22: Class A emissions
  • FCC 47 CFR Part 15B: Class A emissions
  • ICES-001: Class A emissions
Note In the United States (per FCC 47 CFR), Class A equipment is intended for use in commercial, light-industrial, and heavy-industrial locations. In Europe, Canada, Australia, and New Zealand (per CISPR 11), Class A equipment is intended for use only in heavy-industrial locations.
Note Group 1 equipment (per CISPR 11) is any industrial, scientific, or medical equipment that does not intentionally generate radio frequency energy for the treatment of material or inspection/analysis purposes.
Note For EMC declarations, certifications, and additional information, refer to the Product Certifications and Declarations section.

Product Certifications and Declarations

Refer to the product Declaration of Conformity (DoC) for additional regulatory compliance information. To obtain product certifications and the DoC for NI products, visit ni.com/product-certifications, search by model number, and click the appropriate link.

Environmental Management

NI is committed to designing and manufacturing products in an environmentally responsible manner. NI recognizes that eliminating certain hazardous substances from our products is beneficial to the environment and to NI customers.

For additional environmental information, refer to the Engineering a Healthy Planet web page at ni.com/environment. This page contains the environmental regulations and directives with which NI complies, as well as other environmental information not included in this document.

EU and UK Customers

  • 1378 Waste Electrical and Electronic Equipment (WEEE)—At the end of the product life cycle, all NI products must be disposed of according to local laws and regulations. For more information about how to recycle NI products in your region, visit ni.com/environment/weee.
  • 电子信息产品污染控制管理办法(中国RoHS)

  • 1378 中国RoHSNI符合中国电子信息产品中限制使用某些有害物质指令(RoHS)。关于NI中国RoHS合规性信息,请登录 ni.com/environment/rohs_china。(For information about China RoHS compliance, go to ni.com/environment/rohs_china.)
  • 1 Both CH 0+/- or CH 1+/- terminals are terminated to ground through loads of the same value. Measured as differential Vpk-pk. Each terminal Vpk-pk is half of the differential Vpk-pk.

    2 Amplitude values assume the full scale of the DAC is utilized. If an amplitude smaller than the minimum value is desired, you can use waveforms less than the full scale of the DAC or you can use digital gain. Gain values in NI-FGEN correspond to Vpk, which is half the amplitude in Vpk-pk

    3 For DC accuracy, differential output range is defined as 2 times the gain setting into high impedance. For example, the accuracy of a DC signal with a gain of 1, a load impedance of 1 GΩ, and a differential output range of 2 V is calculated by the following equation:

    Gain Error within ±5 °C of Self-Cal temperature: ±0.2% x (2 V) = ±4 mV

    Gain Error at + 10 °C of Self-Cal temperature: 4 mV + 0.03% x 5 x (2 V) = 7 mV

    4 Common mode offset is minimized through active circuitry. Applying an external nonzero common-mode offset to the output terminal is not recommended; however the common-mode circuitry can sink or source up to 5 mA of common-mode bias current. Terminate both output terminals to ground through the same impedance. If the output terminals are not terminated to ground, the maximum termination voltage is 250 mV through 50 Ω.

    5 ±5 °C of self-calibration temperature. Alignment can be improved with manual adjustment by using Sample Clock Delay.

    6 Both output terminals must be terminated with the same impedance to ground.

    7 Both CH 0+/– or CH 1+/– terminals are terminated to ground through loads of the same value.

    8 Clipping may occur if the summed voltage is outside the maximum voltage range.

    9 -3 dB, 400 MS/s. Includes DAC sinc response. Flatness correction disabled.

    10 With respect to 50 kHz into 100 Ω differential load, 400 MS/s

    11 Flatness correction corrects for analog frequency response and DAC sinc response up to 0.3 x Sample Rate. Receiver return loss may degrade flatness.

    12 Valid for use without OSP enabled or when interpolating by 2x with OSP enabled. For all larger interpolation rates using OSP, the OSP filters may introduce extra ripple. Refer to the Interpolating Flat Filter Passband Ripple specification in the OSP section for more information about OSP filter ripple

    13 Frequency ranges with flatness correction enabled are sample rate dependent.

    14 Value = Min (0.3 x Sample Rate, 60 MHz)

    15 Value = 0.3 x Sample Rate

    16 With respect to 50 kHz on each channel, 400 MS/s. Load variations may degrade performance. Refer to the AC Amplitude Accuracy specification for more information about the 50 kHz reference accuracy.

    17 400 MS/s, amplitude -1 dBFS. Includes aliased harmonics. Measured differentially.

    18 400 MS/s, amplitude -1 dBFS. Measured from DC to 200 MHz. Also called harmonic distortion. All values are typical and include aliased harmonics. Differential output measured single-ended with balun.

    19 Long, nonrepetitive waveforms like modulated signals offer better spurious performance. For periodic waveforms represented by a small number of unique samples, DAC nonlinearities limit dynamic specifications.

    The first specification listed is for a 10.0 MHz sinusoid at a 400 MS/s sample rate (waveform contains 40 unique samples), while the specification in parentheses is for a 10.0 MHz sinusoid at a 399.9 MS/s sample rate (waveform contains over 3000 unique samples with unique DAC codes).

    20 400 MS/s, amplitude -1 dBFS. Measured from DC to 200 MHz. All values are typical and include aliased harmonics. Differential output measured single-ended with balun .

    21 Generating full-scale sine wave at frequency listed, 400 MS/s. Measured 200 MHz to 2 GHz. Anti-imaging filter is fixed and optimized for 400 MS/s. Reduced sample rates degrade image rejection.

    22 Amplitude –1 dBFS. Includes the 2nd through the 6th harmonic. Measured at 0.1 MHz offset. 400 MS/s sample rate. Differential output measured single-ended with balun.

    23 Amplitude -7 dBFS. Differential output measured single-ended with balun. 400 MS/s sample rate. Two-tone frequencies are frequency ±100 kHz.

    24 Average noise density from DC to 200 MHz, 400 MS/s. Direct path, differential, 1 Vpk-pk signal range, measured with balun, generating -40 dBm, 1 MHz sine wave.

    25 Using an external Sample Clock at some frequencies may introduce phase noise spurs due to external clock beating with onboard clock.

    26

    Generating sine wave at output frequency. System output jitter integrated from 100 Hz to 100 kHz.

    27 The PXIe-5450 is optimized for frequency-domain performance.

    28 Aberrations on pulsed waveforms are due to the analog reconstruction filter and can be significantly reduced if waveform data has limited slew rate. Waveforms with higher slew rates are not recommended.

    29 Values into 50 Ω.

    30 7% aberrations achievable with 133 V/µs slew rate limiting on waveform data. Pulsed waveforms should contain multiple data points per rising or falling edge, regardless of DAC rate or signal frequency.

    31 Varies with Sample clock frequency. Specification is worst-case.

    32 Set in software with the Channel Delay property or the NIFGEN_ATTR_CHANNEL_DELAY attribute.

    33 ±0.01% accuracy required.

    34 Measured without an external Reference clock. When locking to a Reference clock, frequency accuracy is solely dependent on the frequency accuracy of the Reference clock source.

    35 Set in software with the Channel Delay property or the NIFGEN_ATTR_CHANNEL_DELAY attribute.

    36 With optional divider.

    37 With optional divider.

    38 Not applicable for all destinations. Refer to the specifications for your clocking configuration for applicable ranges.

    39 The maximum value of the divisor, K, is sample rate dependent.

    40 The maximum value of the Sample clock divisor, K, is sample rate dependent.

    41 Output drivers are +3.3 V TTL/CMOS compatible up to 200 MHz.

    42 Load of 10 pF.

    43 There are two data markers per channel.

    44 Memory is shared between both channels.

    45 The minimum waveform size is sample rate dependent. Measured using a 200 MHz trigger.

    46 All trigger modes except where noted.

    47 Condition: One or two segments in a sequence.

    48 Condition: One or two segments in a sequence.

    49 Condition: Waveform size is <4,000 samples.

    50 Single Trigger mode. Play times can be significantly extended by using Continuous, Stepped, or Burst Trigger modes.

    51 For example, for a Sample clock rate of 400 MS/s, I/Q rate range = 12.2 kS/s to 200 MS/s.

    52 When using an external I/Q modulator, RF bandwidth = 0.8 * I/Q Rate.

    53 Unitless

    54 Applied after prefilter gain.

    55 Overflows occur when |Output| > 1.

    56 Lowpass filter that minimizes ripple to: I/Q rate × Passband.

    57 When using pulse shaping, these filters require an OSP interpolation factor of 24 or greater.

    58 When using pulse shaping, these filters require an OSP interpolation factor of 24 or greater.

    59 Frequency shift using the NCO is a quadrature (complex) operation.

    60 For example, 1.42 μHz with a sample rate of 400 MS/s.

    61 Software- and system-dependent.

    62 Full-scale output.

    63 Passband from 0 to (0.4 × I/Q Rate). Ripple is dependent upon the interpolation rate.

    64 Stopband suppression from (0.6 × I/Q rate).