PXIe-5450 Specifications
- Updated2023-02-19
- 19 minute(s) read
PXIe-5450 Specifications
These specifications apply to the 128 MB and 512 MBPXIe-5450.
Definitions
Warranted specifications describe the performance of a model under stated operating conditions and are covered by the model warranty.
Characteristics describe values that are relevant to the use of the model under stated operating conditions but are not covered by the model warranty.
- Typical specifications describe the performance met by a majority of models.
- Nominal specifications describe an attribute that is based on design, conformance testing, or supplemental testing.
Specifications are Nominal unless otherwise noted.
Conditions
Specifications are valid under the following conditions unless otherwise noted.
- Signals terminated with 50 Ω to ground
- Direct path set to 0.5 Vpk differential (gain = 0.5, 1 Vpk-pk differential)
- Sample clock set to 400 MS/s
- Onboard Sample clock with no Reference clock
- 0 °C to 55 °C ambient temperature
Warranted specifications are valid under the following conditions unless otherwise noted.
- 15 minutes warm-up time at ambient temperature
- Calibration cycle maintained
- Chassis fan speed set to High
- NI-FGEN instrument driver used
- NI-FGEN instrument driver self-calibration performed after instrument is stable
Typical specifications are valid under the following conditions unless otherwise noted:
- Over ambient temperature ranges of 23 ±5 °C with a 90% confidence level, based on measurements taken during development or production
Analog Outputs
CH 0+/–, CH 1+/– (Analog Outputs, Front Panel Connectors)
Number of channels | 2 |
Output type | Differential |
Output paths | Direct path |
DAC resolution | 16 bits |
Amplitude and Offset
Amplitude resolution | 4 digits, <0.0025% (0.0002 dB of amplitude range) |
Accuracy
Accuracy
DC Accuracy Measured with a DMM. Differential offset is not adjusted during self-calibration. Measured with both output terminals terminated to ground through a high impedance.
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Absolute Differential Offset | ±1 mV (0 °C to 55 °C) | ||||||
Absolute common mode offset[4] | ±350 µV (0 °C to 55 °C) | ||||||
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AC Amplitude Accuracy Measured using a DMM, with full-scale data into highimpedance, 50 kHz sine wave, 400 MS/s.
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Channel-to-channel timing alignment accuracy[5] | 35 ps 25 ps, typical |
Output Characteristics
Output impedance | 50 Ω nominal, per connector[6] | ||||||||||||||||||||
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Load impedance compensation | Output amplitude is compensated for user-specified load impedance to ground. Performed in software. | ||||||||||||||||||||
Output coupling | DC | ||||||||||||||||||||
Output enable | Software-selectable. When disabled, output is terminated with a 50 Ω, 1 W resistor. | ||||||||||||||||||||
Maximum output overload[7] | ±8 V from a 50 Ω source | ||||||||||||||||||||
Waveform summing | The output terminals support waveform summing, which means the outputs of multiple PXIe-5450 signal generators can be connected together.[8] |
Frequency Response
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Analog filter | 4-pole filter for image suppression |
Passband Flatness | Flatness Correction Disabled | Flatness Correction Enabled[12],[13] | ||
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0 MHz to 60 MHz [13],[14] | 0.5 dB, typical |
0.24 dB
0.13 dB, typical |
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60 MHz [13] , [14] to 120 MHz [13],[15] | 1.9 dB, typical |
0.34 dB
0.19 dB, typical |
Passband Flatness | Flatness Correction Disabled | Flatness Correction Enabled[12],[13] | ||
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Channel-to-Channel Passband Flatness Matching 0 MHz to 60 MHz [13],[14] | 0.05 dB, typical | 0.03 dB, typical | ||
Channel-to-Channel Passband Flatness Matching 60 MHz[13],[14] to 120 MHz [13],[15] | 0.18 dB, typical | 0.04 dB, typical |
Spectral Characteristics
Frequency Range | SFDR Without Harmonics (dB) | SFDR With Harmonics (dB) | ||||
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DC to 7 MHz | 98 | 88 | ||||
DC to 200 MHz | 84 | 75 |
Frequency (MHz) | SFDR (dB) |
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10 | 70 (74)[19] |
60 | 68 (70)[19] |
100 | 62 |
120 | 62 |
160 | 62 |
Frequency (MHz) | SFDR (dB) |
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10 | 70 (74)[19] |
60 | 68 (73)[19] |
100 | 64 |
120 | 62 |
160 | 62 |
In-Band Tone Frequency (MHz) | Out of Band Spur Level (dBm) |
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0 to 20 | <–80 dBm |
20 to 50 | <–65 dBm |
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Frequency (MHz) | THD (dBc) |
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10 | -75 |
20 | -70 |
40 | -68 |
80 | -68 |
100 | -68 |
120 | -78 |
160 | -83 |
Frequency (MHz) | IMD (dBc) |
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10 | -84 |
20 | -81 |
40 | -75 |
80 | -71 |
100 | -68 |
120 | -68 |
160 | -66 |
Amplitude Range | Average Noise Density | |||
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Vpk-pk | dBm |
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dBm/Hz | dBFS/Hz |
1 | 4.0 | 2.24 | -160 | -164 |
Output Phase Noise and Jitter
Sample Clock Source | Output Freq. (MHz) | System Phase Noise Density[26] (dBc/Hz) | System Output Integrated Jitter[26] | ||||
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100 Hz | 1 kHz | 10 kHz | 100 kHz | 1 MHz | |||
Internal, High Resolution Clock, 400 MS/s | 10 | <-121 | <-137 | <-146 | <-152 | <-153 | <350 fs |
100 | <-101 | <-119 | <-126 | <-136 | <-141 | <350 fs | |
CLK IN External 10 MHz Reference Clock,400 MS/s | 10 | <-122 | <-135 | <-146 | <-152 | <-153 | <350 fs |
100 | <-105 | <-115 | <-126 | <-136 | <-141 | <350 fs |
Suggested Maximum Frequencies for Common Functions[27]
Pulse Response, Typical
Clocking
Onboard Sample Clock
Reference Clock Sources | None (internal reference) PXI_CLK10 (backplane) CLK IN (front panel connector) |
Reference Clock Frequency[33] | 1 MHz to 100 MHz in increments of 1 MHz 100 MHz to 200 MHz in increments of 2 MHz 200 MHz to 400 MHz in increments of 4 MHz Default of 10 MHz |
Internal Reference Clock Frequency Accuracy[34] | ±0.01% |
External Sample Clock
External Sample clock source | CLK IN front panel connector, with multiplication and division |
External Sample clock rate | 10 MS/s, 20 MS/s to 400 MS/s |
Sample Clock rate range | 12.2 kS/s to 400 MS/s |
Multiplication/Division factor range | Varies depending on the external Sample clock rate |
External Sample clock delay | 0 ns to 2 ns, independent per channel[35] |
External Sample clock delay resolution | 10 ps, nominal |
External Sample clock timebase phase adjust | ±1 Sample clock timebase period |
External Sample Clock Timebase
External Sample clock timebase sources | CLK IN front panel connector, with division |
External Sample clock timebase rate range | 200 MS/s to 400 MS/s |
Divide factor range | 1, 2 to 32768 in steps of 2 |
Sample Clock delay | 0 ns to 2 ns, independent per channel |
Sample Clock delay resolution | 10 ps nominal |
Exporting Clocks
Terminals
CLK IN (Sample Clock and Reference Clock Input, Front Panel Connector)
Direction | Input | ||||||
Destinations | Reference clock, Sample clock, or Sample clock timebase | ||||||
Frequency range | 1 MHz to 400 MHz[38] | ||||||
Input impedance | 50 Ω , nominal | ||||||
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Duty cycle requirements | 45% to 55% | ||||||
Input coupling | AC | ||||||
Voltage standing wave ratio (VSWR) | 1.3:1 up to 2 GHz, nominal |
CLK OUT (Sample Clock and Reference Clock Output, Front Panel Connector)
Direction | Output |
Sources | Sample clock, divided by integer K (1≤ K ≤ 3, minimum[39]), Reference clock, or Sample clock timebase, divided by integer M (1 ≤ M ≤ 1048576) |
Frequency Range | 100 kHz to 400 MHz |
Output Voltage | ≥0.7 Vpk-pk into 50 Ω typical |
Maximum Output Overload | 3.3 Vpk-pk from a 50 Ω source |
Output Coupling | AC |
VSWR | 1.3:1 up to 2 GHz nominal |
PFI 0 and PFI 1 (Programmable Function Interface, Front Panel Connectors)
Direction | Bidirectional | ||||||||||||||||||
Frequency Range | DC to 200 MHz | ||||||||||||||||||
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Triggers and Events
Triggers
Sources | PFI<0..1> (SMB front panel connectors) PXI_Trig<0..7> (backplane connector) Immediate (does not wait for a trigger). Default. | ||||||||
Types | Start trigger edge, Script trigger edge and level, Software trigger | ||||||||
Edge detection | Rise, falling | ||||||||
Minimum pulse width | 25 ns | ||||||||
Delay from trigger to analog output with OSP disabled | 154 Sample clock timebase periods + 65 ns, nominal | ||||||||
Additional delay with OSP enabled | Varies with OSP configuration | ||||||||
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Events
Destinations | PFI<0..1> (SMB front panel connectors) PXI_Trig<0..6> (backplane connector) | ||||||
Types | Marker<0..3>, Data Marker<0..1>[43], Ready for Start, Started, Done | ||||||
Quantum | Marker position must be placed at an integer multiple of two samples. | ||||||
Width | Adjustable, minimum of 2 samples. Default is 150 ns. | ||||||
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Waveform Generation Capabilities
Memory Usage | The PXIe-5450 uses the Synchronization and Memory Core (SMC) technology in which waveforms and instructions share onboard memory. Parameters, such as number of segments in sequence list, maximum number of waveforms in memory, and number of samples available for waveform storage, are flexible and user defined. | ||||||
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Loop Count | 1 to 16,777,215 Burst trigger: Unlimited | ||||||
Quantum | Waveform size must be an integer multiple of two samples. | ||||||
Output modes | Arbitrary Waveform, Script, and Arbitrary Sequence |
Trigger Mode | Number of Channels | Arbitrary Waveform Mode | Arbitrary Sequence Mode >180 MS/s | Arbitrary Sequence Mode ≤180MS/s | |||
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Single | 1 | 4 | 2 | 2 | |||
2 | 4 | 4 | 4 | ||||
Continuous | 1 | 142 | 140 | 58 | |||
2 | 284 | 280 | 116 | ||||
Stepped | 1 | 210 | 154 | 54 | |||
2 | 420 | 308 | 108 | ||||
Burst | 1 | 142 | 1,134 | 476 | |||
2 | 284 | 2,312 | 952 |
Generation Mode | Number of Channels | 128 MB | 512 MB | ||
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Arbitrary Waveform Mode, Maximum Waveform Memory[46] | 1 | 67,108,352 | 268,434,944 | ||
2 | 33,553,920 | 134,217,216 | |||
Arbitrary Sequence Mode, Maximum Waveform Memory[47] | 1 | 67,108,352 | 268,434,944 | ||
2 | 33,553,920 | 134,217,216 | |||
Arbitrary Sequence Mode, Maximum Waveforms[48] | 1 | 1,048,575 | 4,194,303 | ||
2 | 524,287 | 2,097,151 | |||
Arbitrary Sequence Mode, Maximum Segments in a Sequence[49] | 1 | 8,388,597 | 33,554,421 | ||
2 | 4,194,293 | 16,777,205 |
Sample Rate | Number of Channels | 128 MB | 512 MB | ||
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400 MS/s | 1 | 0.17 seconds | 0.67 seconds | ||
2 | 0.084 seconds | 0.34 seconds | |||
25 MS/s | 1 | 2.68 seconds | 10.74 seconds | ||
2 | 1.34 seconds | 5.37 seconds | |||
100 kS/s | 1 | 11 minutes 11 seconds | 44 minutes 44 seconds | ||
2 | 5 minutes 35 seconds | 22 minutes 22 seconds |
Onboard Signal Processing
I/Q Rate
OSP interpolation range | 2, 4, 8, 12, 16, 20 24 to 8,192 (multiples of 8) 8,192 to 16,384 (multiples of 16) 16,384 to 32,768 (multiples of 32) |
I/Q rate[51] | (Sample Clock rate) ÷ (OSP interpolation) |
Bandwith[52] | 0.4 * I/Q rate, per output |
Data processing modes | Real (I path only) or Complex (I/Q) |
OSP mode | Baseband |
Prefilter Gain and Offset
Finite Impulse Response (FIR) Filtering
Numerically Controlled Oscillator (NCO)
Digital Performance
Calibration
External Calibration | The external calibration calibrates the ADC voltage reference and passband flatness. Appropriate constants are stored in nonvolatile memory. |
Self-Calibration | An onboard, 24-bit ADC and precision voltage reference are used to calibrate the DC gain and offset. Onboard channel alignment circuitry is used to calibrate the skew between channels. The self-calibration is initiated by the user through the software and takes approximately 60 seconds to complete. Appropriate constants are stored in nonvolatile memory. |
Calibration Interval | Specifications valid within 1 year of external calibration |
Warm-up Time | 15 minutes |
Power
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Physical
Dimensions | 3U, two-slot, PXI Express module 21.6 cm × 4.0 cm × 13.0 cm (8.5 in. × 1.6 in. × 5.1 in.) |
Weight | 476 g (17 oz) |
Environment
Maximum altitude | 2,000 m (800 mbar) (at 25 °C ambient temperature) |
Pollution Degree | 2 |
Indoor use only.
Operating Environment
Ambient temperature range | 0 °C to 55 °C |
Relative humidity range | 10% to 90%, noncondensing |
Storage Environment
Ambient temperature range | -25 °C to 85 °C |
Relative humidity range | 5% to 95%, noncondensing |
Shock and Vibration
Operating shock | 30 g peak, half-sine, 11 ms pulse | ||||||
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Compliance and Certifications
Safety Compliance Standards
This product is designed to meet the requirements of the following electrical equipment safety standards for measurement, control, and laboratory use:
- IEC 61010-1, EN 61010-1
- UL 61010-1, CSA C22.2 No. 61010-1
Electromagnetic Compatibility
- EN 61326-1 (IEC 61326-1): Class A emissions; Basic immunity
- EN 55011 (CISPR 11): Group 1, Class A emissions
- EN 55022 (CISPR 22): Class A emissions
- EN 55024 (CISPR 24): Immunity
- AS/NZS CISPR 11: Group 1, Class A emissions
- AS/NZS CISPR 22: Class A emissions
- FCC 47 CFR Part 15B: Class A emissions
- ICES-001: Class A emissions
Product Certifications and Declarations
Refer to the product Declaration of Conformity (DoC) for additional regulatory compliance information. To obtain product certifications and the DoC for NI products, visit ni.com/product-certifications, search by model number, and click the appropriate link.
Environmental Management
NI is committed to designing and manufacturing products in an environmentally responsible manner. NI recognizes that eliminating certain hazardous substances from our products is beneficial to the environment and to NI customers.
For additional environmental information, refer to the Engineering a Healthy Planet web page at ni.com/environment. This page contains the environmental regulations and directives with which NI complies, as well as other environmental information not included in this document.
EU and UK Customers
电子信息产品污染控制管理办法(中国RoHS)
1 Both CH 0+/- or CH 1+/- terminals are terminated to ground through loads of the same value. Measured as differential Vpk-pk. Each terminal Vpk-pk is half of the differential Vpk-pk.
2 Amplitude values assume the full scale of the DAC is utilized. If an amplitude smaller than the minimum value is desired, you can use waveforms less than the full scale of the DAC or you can use digital gain. Gain values in NI-FGEN correspond to Vpk, which is half the amplitude in Vpk-pk
3 For DC accuracy, differential output range is defined as 2 times the gain setting into high impedance. For example, the accuracy of a DC signal with a gain of 1, a load impedance of 1 GΩ, and a differential output range of 2 V is calculated by the following equation:
Gain Error within ±5 °C of Self-Cal temperature: ±0.2% x (2 V) = ±4 mV
Gain Error at + 10 °C of Self-Cal temperature: 4 mV + 0.03% x 5 x (2 V) = 7 mV
4 Common mode offset is minimized through active circuitry. Applying an external nonzero common-mode offset to the output terminal is not recommended; however the common-mode circuitry can sink or source up to 5 mA of common-mode bias current. Terminate both output terminals to ground through the same impedance. If the output terminals are not terminated to ground, the maximum termination voltage is 250 mV through 50 Ω.
5 ±5 °C of self-calibration temperature. Alignment can be improved with manual adjustment by using Sample Clock Delay.
6 Both output terminals must be terminated with the same impedance to ground.
7 Both CH 0+/– or CH 1+/– terminals are terminated to ground through loads of the same value.
8 Clipping may occur if the summed voltage is outside the maximum voltage range.
9 -3 dB, 400 MS/s. Includes DAC sinc response. Flatness correction disabled.
10 With respect to 50 kHz into 100 Ω differential load, 400 MS/s
11 Flatness correction corrects for analog frequency response and DAC sinc response up to 0.3 x Sample Rate. Receiver return loss may degrade flatness.
12 Valid for use without OSP enabled or when interpolating by 2x with OSP enabled. For all larger interpolation rates using OSP, the OSP filters may introduce extra ripple. Refer to the Interpolating Flat Filter Passband Ripple specification in the OSP section for more information about OSP filter ripple
13 Frequency ranges with flatness correction enabled are sample rate dependent.
14 Value = Min (0.3 x Sample Rate, 60 MHz)
15 Value = 0.3 x Sample Rate
16 With respect to 50 kHz on each channel, 400 MS/s. Load variations may degrade performance. Refer to the AC Amplitude Accuracy specification for more information about the 50 kHz reference accuracy.
17 400 MS/s, amplitude -1 dBFS. Includes aliased harmonics. Measured differentially.
18 400 MS/s, amplitude -1 dBFS. Measured from DC to 200 MHz. Also called harmonic distortion. All values are typical and include aliased harmonics. Differential output measured single-ended with balun.
19 Long, nonrepetitive waveforms like modulated signals offer better spurious performance. For periodic waveforms represented by a small number of unique samples, DAC nonlinearities limit dynamic specifications.
The first specification listed is for a 10.0 MHz sinusoid at a 400 MS/s sample rate (waveform contains 40 unique samples), while the specification in parentheses is for a 10.0 MHz sinusoid at a 399.9 MS/s sample rate (waveform contains over 3000 unique samples with unique DAC codes).
20 400 MS/s, amplitude -1 dBFS. Measured from DC to 200 MHz. All values are typical and include aliased harmonics. Differential output measured single-ended with balun .
21 Generating full-scale sine wave at frequency listed, 400 MS/s. Measured 200 MHz to 2 GHz. Anti-imaging filter is fixed and optimized for 400 MS/s. Reduced sample rates degrade image rejection.
22 Amplitude –1 dBFS. Includes the 2nd through the 6th harmonic. Measured at 0.1 MHz offset. 400 MS/s sample rate. Differential output measured single-ended with balun.
23 Amplitude -7 dBFS. Differential output measured single-ended with balun. 400 MS/s sample rate. Two-tone frequencies are frequency ±100 kHz.
24 Average noise density from DC to 200 MHz, 400 MS/s. Direct path, differential, 1 Vpk-pk signal range, measured with balun, generating -40 dBm, 1 MHz sine wave.
25 Using an external Sample Clock at some frequencies may introduce phase noise spurs due to external clock beating with onboard clock.
Generating sine wave at output frequency. System output jitter integrated from 100 Hz to 100 kHz.
27 The PXIe-5450 is optimized for frequency-domain performance.
28 Aberrations on pulsed waveforms are due to the analog reconstruction filter and can be significantly reduced if waveform data has limited slew rate. Waveforms with higher slew rates are not recommended.
29 Values into 50 Ω.
30 7% aberrations achievable with 133 V/µs slew rate limiting on waveform data. Pulsed waveforms should contain multiple data points per rising or falling edge, regardless of DAC rate or signal frequency.
31 Varies with Sample clock frequency. Specification is worst-case.
32 Set in software with the Channel Delay property or the NIFGEN_ATTR_CHANNEL_DELAY attribute.
33 ±0.01% accuracy required.
34 Measured without an external Reference clock. When locking to a Reference clock, frequency accuracy is solely dependent on the frequency accuracy of the Reference clock source.
35 Set in software with the Channel Delay property or the NIFGEN_ATTR_CHANNEL_DELAY attribute.
36 With optional divider.
37 With optional divider.
38 Not applicable for all destinations. Refer to the specifications for your clocking configuration for applicable ranges.
39 The maximum value of the divisor, K, is sample rate dependent.
40 The maximum value of the Sample clock divisor, K, is sample rate dependent.
41 Output drivers are +3.3 V TTL/CMOS compatible up to 200 MHz.
42 Load of 10 pF.
43 There are two data markers per channel.
44 Memory is shared between both channels.
45 The minimum waveform size is sample rate dependent. Measured using a 200 MHz trigger.
46 All trigger modes except where noted.
47 Condition: One or two segments in a sequence.
48 Condition: One or two segments in a sequence.
49 Condition: Waveform size is <4,000 samples.
50 Single Trigger mode. Play times can be significantly extended by using Continuous, Stepped, or Burst Trigger modes.
51 For example, for a Sample clock rate of 400 MS/s, I/Q rate range = 12.2 kS/s to 200 MS/s.
52 When using an external I/Q modulator, RF bandwidth = 0.8 * I/Q Rate.
53 Unitless
54 Applied after prefilter gain.
55 Overflows occur when |Output| > 1.
56 Lowpass filter that minimizes ripple to: I/Q rate × Passband.
57 When using pulse shaping, these filters require an OSP interpolation factor of 24 or greater.
58 When using pulse shaping, these filters require an OSP interpolation factor of 24 or greater.
59 Frequency shift using the NCO is a quadrature (complex) operation.
60 For example, 1.42 μHz with a sample rate of 400 MS/s.
61 Software- and system-dependent.
62 Full-scale output.
63 Passband from 0 to (0.4 × I/Q Rate). Ripple is dependent upon the interpolation rate.
64 Stopband suppression from (0.6 × I/Q rate).