PXIe-5423 Specifications

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Updated2025-04-11
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PXIe-5423 Specifications

Definitions

Warranted specifications describe the performance of a model under stated operating conditions and are covered by the model warranty. Warranted specifications account for measurement uncertainties, temperature drift, and aging. Warranted specifications are ensured by design or verified during production and calibration.

Characteristics describe values that are relevant to the use of the model under stated operating conditions but are not covered by the model warranty.

Typical specifications describe the performance met by a majority of models.
Nominal specifications describe an attribute that is based on design, conformance testing, or supplemental testing.
Measured specifications describe the measured performance of a representative model.

Specifications are Nominal unless otherwise noted.

Conditions

All specifications are valid under the following conditions unless otherwise noted:

Signals terminated with 50 Ω to ground
Load impedance set to 50 Ω
Amplitude set to 2.4 V_pk-pk
Analog Path property or NIFGEN_ATTR_ANALOG_PATH attribute set to Main (default)
Reference Clock set to Onboard Reference Clock

Warranted and typical specifications are valid under the following conditions unless otherwise noted:

Ambient temperature range of 0 °C to 55 °C
15-minute warm-up time before operation
Self-calibration performed after instrument is stable
External calibration cycle maintained and valid
PXI Express chassis fan speed set to HIGH, foam fan filters removed if present, and empty slots contain PXI chassis slot blockers and filler panels

PXIe-5423 Pinout

Use the pinout to connect to terminals on the PXIe-5423.

Access LED
Active LED
SMA Connector: CH 0
SMA Connector: CH 1
SMA Connector: PFI 0
SMA Connector: PFI 1
MHDMR Connector: AUX 0

Table 1. SMA Connector Signal Descriptions
Signal	Access	Description
CH 0	Output	Generates waveforms from an analog output terminal.
CH 1	Output	Generates waveforms from an analog output terminal.
PFI 0	Input/Output	Imports digital trigger signals and exports digital event signals. Imported digital trigger signals can start or step through waveform generation. Exported event signals indicate the state of the generation engine.
PFI 1	Input/Output

AUX Connector

Note The AUX 0 connector accepts a standard, third-party HDMI™ type C cable, but the AUX 0 port is not an HDMI interface and the specified performance of the AUX 0 connector is not guaranteed if a third-party HDMI cable is used. Use NI cable assembly SHH19-MH19-AUX for all AUX 0 connections. Do not connect the AUX 0 port on the PXIe-5423 to the HDMI port of another device. NI is not liable for any damage resulting from such signal connections.

Table 2. AUX 0 Connector Signal Descriptions
Pin	Signal	Description
1	GND	Ground reference for signals
2	NC	No connection
3	GND	Ground reference for signals
4	GND	Ground reference for signals
5	NC	No connection
6	GND	Ground reference for signals
7	GND	Ground reference for signals
8	AUX 0/PFI 0	Bidirectional PFI line
9	AUX 0/PFI 1	Bidirectional PFI line
10	GND	Ground reference for signals
11	AUX 0/PFI 2	Bidirectional PFI line
12	AUX 0/PFI 3	Bidirectional PFI line
13	GND	Ground reference for signals
14	AUX 0/PFI 4	Bidirectional PFI line
15	AUX 0/PFI 5	Bidirectional PFI line
16	AUX 0/PFI 6	Bidirectional PFI line
17	AUX 0/PFI 7	Bidirectional PFI line
18	+3.3 V	+3.3 V power output (200 mA maximum)
19	GND	Ground reference for signals

Use the SCB-19 connector block to connect digital signals to the AUX 0 connector.

Table 3. SCB-19 Signal Descriptions
Signal Name	Description
PFI <0..7>	Bidirectional PFI line
NC	No connection
+3.3 V	+3.3 V power (200 mA maximum)
GND	Ground reference for signals

Analog Output

Number of channels^[1]¹ Channels support independent waveform generation.	1 or 2
Output type	Referenced single-ended
Connector type	SMA
DAC resolution	16 bits

Amplitude range^[2]² Amplitude values assume the full scale of the DAC is utilized. NI-FGEN uses waveforms less than the full scale of the DAC to create amplitudes smaller than the minimum value., in 0.16 dB steps
50 Ω load	0.00775 V_pk-pk to 12 V_pk-pk
Open load	0.0155 V_pk-pk to 24 V_pk-pk

Offset range	±50% of Amplitude Range (V_pk-pk)^[3]³ For example, a 5.5 V_pk-pk range equals ±2.75 V maximum offset. Offset range has a limitation of ±12 V absolute signal swing into high-impedance loads (Amplitude + \|Offset\| ≤ 12 V into high-impedance load or 6 V into 50 Ω load).
Offset resolution	16-bit full-scale range

DC accuracy^[4]⁴ Terminated with high-impedance load (load impedance set to 1 MΩ). The analog path is calibrated for amplitude, gain, and offset errors.

Within ±5 °C of self-calibration temperature

±0.35% of Amplitude Range ± 0.35% of Offset Requested ± 500 µV, warranted^[5]⁵ Where Amplitude Range is the requested amplitude in V_pk-pk. For example, a DC signal with an amplitude range of 16 V_pk-pk and offset of 1.5 will calculate DC accuracy using the following equation: ±[(0.35% * 16 V) + (0.35% * 1.5 V) + 500 µV] = ±61.75 mV. The DC standard function always uses the 24 V_pk-pk amplitude range.

0 °C to 55 °C

±0.55% of Amplitude Range ± 0.55% of Offset Requested ± 500 µV, typical

AC amplitude accuracy^[6]⁶ With 50 kHz sine wave and terminated with high-impedance load. (within ±5 °C of self-calibration temperature)	±1.0% ± 1 mV_pk-pk, warranted
Output impedance	50 Ω
Load impedance	Output waveform is compensated for user-specified impedances
Output coupling (ground referenced)	DC
Output enable^[7]⁷ When the output path is disabled, the channel output is terminated to ground with a 50 Ω, 1 W resistor.	Software-selectable
Maximum output overload^[8]⁸ No damage occurs if the analog output channels are shorted to ground indefinitely.	±12 V_pk-pk from a 50 Ω source
Waveform summing	Supported^[9]⁹ The output terminals of multiple PXIe-5423 waveform generators can be connected together.

Standard Function

Sine Waveform

Frequency range	0 MHz to 40 MHz
Frequency step size	2.84 µHz

Table 4. Passband Flatness^[10]¹⁰ Normalized to 50 kHz.
Sine Frequency	Passband Flatness (dB), Warranted
	0.06 V_pk-pk to 2.75 V_pk-pk	>2.75 V_pk-pk
1 MHz	±0.4	±0.4
10 MHz	±0.4	±0.4
20 MHz	±0.4	±0.6
40 MHz ^[11]¹¹ With sine frequencies of 40 MHz and ambient temperatures above 45 °C, add ±0.015 dB/°C to the passband flatness specification.	±0.45	±0.8

Table 5. Spurious-Free Dynamic Range (SFDR) with Harmonics
Sine Frequency	SFDR with Harmonics (dBc), Measured
	0.1 V_pk-pk to 1 V_pk-pk	1 V_pk-pk to 2.75 V_pk-pk	>2.75 V_pk-pk
1 MHz	62	76	77
3 MHz	62	74	63
5 MHz	61	74	58
10 MHz	61	69	52
20 MHz	61	63	44
30 MHz	59	60	40
40 MHz	55	58	35

Note Measured at an amplitude of -1 dBFS with 0 V DC offset, measured from DC to 400 MHz, and limited to a -90 dBm spur at low amplitudes.

Table 6. Spurious-Free Dynamic Range (SFDR) without Harmonics
Sine Frequency	SFDR without Harmonics (dBc), Measured
	0.1 V_pk-pk to 1 V_pk-pk	1 V_pk-pk to 2.75 V_pk-pk	>2.75 V_pk-pk
1 MHz	62	84	92
3 MHz	62	84	92
5 MHz	62	84	92
10 MHz	61	83	90
20 MHz	61	83	90
30 MHz	61	83	83
40 MHz	61	83	83

Note Measured at an amplitude of -1 dBFS with 0 V DC offset, measured from DC to 400 MHz, and limited to a -90 dBm spur at low amplitudes.

Table 7. Total Harmonic Distortion (THD)
Sine Frequency	THD (dBc), Measured
	0.1 V_pk-pk to 2.75 V_pk-pk	2.75 V_pk-pk to 12 V_pk-pk
1 MHz	79	76
3 MHz	73	62
5 MHz	72	56
10 MHz	68	49
20 MHz	61	43
30 MHz	58	39
40 MHz	55	35

Note Measured at an amplitude of -1 dBFS and measured from DC to the sixth harmonic.

Figure 5. 5 MHz Spectrum at 0.6 V_pk-pk, Measured

Note Noise floor is limited by the noise floor of the measurement device.

Figure 6. 10 MHz Spectrum at 2 V_pk-pk, Measured

Note Noise floor is limited by the noise floor of the measurement device.

Figure 7. 1 MHz Spectrum at 6.5 V_pk-pk, Measured

Note Noise floor is limited by the noise floor of the measurement device.

Table 8. Average Noise Density^[12]¹² At small amplitudes, average noise density is limited by a -154 dBm/Hz noise floor.
Amplitude	Average Noise Density, Typical
	dBm/Hz	$\frac{n V}{\sqrt{H z}}$
0.06 V_pk-pk	-154	3.9
0.1 V_pk-pk	-154	3.9
0.4 V_pk-pk	-150	5.8
1 V_pk-pk	-145	13
2 V_pk-pk	-141	20
4 V_pk-pk	-132	53
12 V_pk-pk	-125	107

Figure 8. Phase Noise^[13]¹³ With 40 MHz carrier and locked to the internal timebase with spurs removed., Measured

Jitter (RMS)^[14]¹⁴ With 40 MHz carrier, integrated from 100 Hz to 100 kHz, and locked to the internal timebase.

214 fs

Square Waveform

Frequency range	0 MHz to 25 MHz
Frequency step size	2.84 µHz
Minimum on/off time^[15]¹⁵ Used for calculating duty cycle limit: Minimum Duty Cycle = (100% * Minimum On Time) ÷ T_periodand Maximum Duty Cycle = 100% - Minimum Duty Cycle. For more information about the relationship between minimum on/off time and duty cycle specifications, refer to ni.com.	17.6 ns
Duty cycle resolution	<0.001%
Rise/fall time^[16]¹⁶ Rise time measured from 10% to 90%.	9 ns, measured
Aberration	1.0%, measured
Jitter (RMS)^[17]¹⁷ Integrated from 10 Hz to 10 MHz using a 22 MHz square wave.	2 ps, measured

Figure 10. Square Waveform Step Response at 12 V_pk-pk, Measured

Ramp and Triangle Waveforms

Frequency range

0 MHz to 5 MHz

User-Defined Function

Frequency range	0 MHz to 40 MHz
Frequency step size	2.84 µHz
Waveform points	8,192
Step response rise time	7 ns, measured

Arbitrary Waveform

Waveform size

2 samples to 64,000,000 samples

User sample rate
Digital filter enabled	5.6 µS/s to 200 MS/s
Digital filter disabled	3.125 MS/s to 200 MS/s

Waveform filters
Digital filter enabled	Bandwidth = 0.2 * User Sample Rate
Digital filter disabled	No reconstruction image rejection

Minimum quantum size

1 sample

Rise time^[18]¹⁸ At maximum user sample rate.
Digital filter enabled	15.3 ns, measured
Digital filter disabled	8.4 ns, measured

Total onboard memory

128 MB per channel

Figure 11. Magnitude Response^[19]¹⁹ Relative to 50 kHz and at 2 V_pk-pk and maximum user sample rate., Measured

Figure 12. 10 MHz Single-Tone Spectrum^[20]²⁰ With the digital filter enabled and at -1 dBFS, 2 V_pk-pk, and 200 MS/s. Noise floor is limited by the noise floor of the measurement device., Measured

Figure 13. 9.5 MHz and 10.5 MHz Dual-Tone Spectrum^[21]²¹ With the digital filter enabled and at -7 dBFS, 2 V_pk-pk, and 200 MS/s. Noise floor is limited by the noise floor of the measurement device., Measured

All Output Modes

Figure 14. Channel-To-Channel Crosstalk, Measured

Clock

Reference Clock source

Internal

PXIe_CLK100 (backplane connector)

Reference Clock frequency

100 MHz (<±25 ppm)

Sample Clock rate

800 MHz

Internal timebase accuracy^[22]²² If locked to an external Reference Clock source, timebase accuracy is equal to the external Reference Clock accuracy.
Initial calibrated accuracy	1.5 ppm, warranted
Time drift^[23]²³ Where time drift starts at the latest external calibration date.	1 ppm per year, warranted
Accuracy	Initial Calibrated Accuracy ± Time Drift, warranted

Synchronization

Channel-to-channel skew, between the channels of a multichannel PXIe-5423 ^[24]²⁴ With a 20 MHz sine wave and both channels configured with the same amplitude.
<2.75 Vpk-pk	±110 ps
>2.75 Vpk-pk	±275 ps

Note The channels of a multichannel PXIe-5423 are automatically synchronized when they are in the same NI-FGEN session.

Synchronization with the NI-TClk API

NI-TClk is an API that enables system synchronization of supported PXI modules in one or more PXI chassis, which you can use with the PXIe-5423 and NI-FGEN.

NI-TClk synchronization support for the PXIe-5423 was first available in NI-FGEN18.1.

NI-TClk uses a shared Reference Clock and triggers to align the Sample Clocks of PXI modules and synchronize the distribution and reception of triggers. These signals are routed through the PXI chassis backplane without external cable connections between PXI modules in the same chassis.

The following definitions apply:

Skew—Misalignment between module timing across slots of a chassis and is caused by clock and analog path delay differences.

Jitter—Variation in module alignment that can be expected with each call to NI-TClk Synchronize.

Manual adjustment—Process of minimizing synchronization jitter and skew by adjusting Trigger Clock (TClk) signals using the instrument driver.

Module-to-module skew, between PXIe-5423 modules using NI-TClk ^[25]²⁵ Specifications are valid for any number of PXIe-5423 modules installed in one chassis, with each PXIe-5423 module using a single NI-FGEN session and having all analog parameters set to identical values, and Sample Clock set to 100 MS/s. For other configurations, including multi-chassis systems, contact NI Technical Support at ni.com/support.

NI-TClk synchronization without manual adjustment
Skew, peak-to-peak	300 ps, typical
Jitter, peak-to-peak	125 ps, typical

NI-TClk synchronization with manual adjustment
Skew, average	<10 ps
Jitter, peak-to-peak	5 ps

Sample Clock delay/adjustment resolution

3.8E(-6) × Sample Clock Period

For example, at 100 MS/s, 3.8E(-6) × (1/100 MS/s) = 38 fs.

PFI I/O

Number of terminals

Connector type
PFI 0 and PFI 1	SMA
AUX 0/PFI <0..7>	MHDMR

Logic level	3.3 V
Maximum input voltage	+5 V
V_IH	2 V
V_IL	0.8 V
Frequency range	0 MHz to 25 MHz
PFI-to-channel crosstalk	-80 dBc, measured

Trigger

Sources/destinations	PFI <0..1> (SMA front panel connectors) AUX 0/PFI <0..7> (MHDMR front panel connector) PXI_Trig <0..7> (backplane connector)
Supported triggers	Start Trigger Script Trigger
Trigger type	Rising edge
Trigger modes^[26]²⁶ In frequency list, arbitrary waveform, and arbitrary sequence output modes.	Single Continuous Stepped Burst
Input impedance (DC)	>100 kΩ

Marker

Destinations

PFI <0..1> (SMA front panel connectors)

AUX 0/PFI <0..7> (MHDMR front panel connector)

PXI_Trig <0..7> (backplane connector)

Pulse width

200 ns

Marker to output skew
PFI <0..1> and AUX 0/PFI <0..7>	±2 ns
PXI_Trig <0..7>	±20 ns

Maximum number of marker outputs per waveform

Calibration

Self-calibration	An onboard reference is used to calibrate the DC gain and offset. The self-calibration is initiated by the user through the software and takes approximately 2 minutes to complete.
External calibration	External calibration calibrates the TCXO, voltage reference, and DC gain and offset. Appropriate constants are stored in nonvolatile memory.
Calibration interval	Specifications valid within 2 years of external calibration
Warm-up time^[27]²⁷ Warm up begins after the chassis is powered and the PXIe-5423 is recognized by the host and configured using NI-FGEN. Self-calibration is recommended following the warm-up time.	15 minutes

Power

Current
+3.3 V rail	2.3 A
+12 V rail	1.8 A

Total power

29 W

Environment

Maximum altitude	2,000 m (800 mbar) (at 25 °C ambient temperature)
Pollution Degree	2

Indoor use only.

Operating Environment


Ambient temperature range, operating	0 °C to 55 °C
Relative humidity range, operating	10% to 90%, noncondensing

Storage Environment


Ambient temperature, storage	-40 °C to 71 °C
Relative humidity range, storage	5% to 95%, noncondensing

Shock and Vibration


Operating shock	30 g peak, half-sine, 11 ms pulse
Random vibration	Operating: 5 Hz to 500 Hz, 0.3 g RMS Nonoperating: 5 Hz to 500 Hz, 2.4 g RMS

Physical

Dimensions

21.6 cm × 2.0 cm × 13.0 cm (8.5 in. × 0.8 in. × 5.1 in.) 3 U, one slot, PXI Express module

Weight
One channel	369 g (13.0 oz)
Two channels	376 g (13.3 oz)

Bus interface
Form factor	Gen 1 x4 module
Slot compatibility	PXI Express or hybrid

Compliance and Certifications

Safety Compliance Standards

This product is designed to meet the requirements of the following electrical equipment safety standards for measurement, control, and laboratory use:

IEC 61010-1, EN 61010-1
UL 61010-1, CSA C22.2 No. 61010-1

Note For safety certifications, refer to the product label or the Product Certifications and Declarations section.

Electromagnetic Compatibility

This product meets the requirements of the following EMC standards for electrical equipment for measurement, control, and laboratory use:

EN 61326-1 (IEC 61326-1): Class A emissions; Basic immunity
EN 55011 (CISPR 11): Group 1, Class A emissions
EN 55022 (CISPR 22): Class A emissions
EN 55024 (CISPR 24): Immunity
AS/NZS CISPR 11: Group 1, Class A emissions
AS/NZS CISPR 22: Class A emissions
FCC 47 CFR Part 15B: Class A emissions
ICES-001: Class A emissions

Note In the United States (per FCC 47 CFR), Class A equipment is intended for use in commercial, light-industrial, and heavy-industrial locations. In Europe, Canada, Australia, and New Zealand (per CISPR 11), Class A equipment is intended for use only in heavy-industrial locations.

Note Group 1 equipment (per CISPR 11) is any industrial, scientific, or medical equipment that does not intentionally generate radio frequency energy for the treatment of material or inspection/analysis purposes.

Note For EMC declarations, certifications, and additional information, refer to Product Certifications and Declarations.

Product Certifications and Declarations

Refer to the product Declaration of Conformity (DoC) for additional regulatory compliance information. To obtain product certifications and the DoC for NI products, visit ni.com/product-certifications, search by model number, and click the appropriate link.

Environmental Management

NI is committed to designing and manufacturing products in an environmentally responsible manner. NI recognizes that eliminating certain hazardous substances from our products is beneficial to the environment and to NI customers.

For additional environmental information, refer to the Engineering a Healthy Planet web page at ni.com/environment. This page contains the environmental regulations and directives with which NI complies, as well as other environmental information not included in this document.

EU and UK Customers

Waste Electrical and Electronic Equipment (WEEE)—At the end of the product life cycle, all NI products must be disposed of according to local laws and regulations. For more information about how to recycle NI products in your region, visit ni.com/environment/weee.

电子信息产品污染控制管理办法（中国RoHS）

中国RoHS— NI符合中国电子信息产品中限制使用某些有害物质指令(RoHS)。关于NI中国RoHS合规性信息，请登录 ni.com/environment/rohs_china。(For information about China RoHS compliance, go to ni.com/environment/rohs_china.)

¹ Channels support independent waveform generation.

² Amplitude values assume the full scale of the DAC is utilized. NI-FGEN uses waveforms less than the full scale of the DAC to create amplitudes smaller than the minimum value.

³ For example, a 5.5 V_pk-pk range equals ±2.75 V maximum offset. Offset range has a limitation of ±12 V absolute signal swing into high-impedance loads (Amplitude + |Offset| ≤ 12 V into high-impedance load or 6 V into 50 Ω load).

⁴ Terminated with high-impedance load (load impedance set to 1 MΩ). The analog path is calibrated for amplitude, gain, and offset errors.

⁵ Where Amplitude Range is the requested amplitude in V_pk-pk. For example, a DC signal with an amplitude range of 16 V_pk-pk and offset of 1.5 will calculate DC accuracy using the following equation: ±[(0.35% * 16 V) + (0.35% * 1.5 V) + 500 µV] = ±61.75 mV. The DC standard function always uses the 24 V_pk-pk amplitude range.

⁶ With 50 kHz sine wave and terminated with high-impedance load.

⁷ When the output path is disabled, the channel output is terminated to ground with a 50 Ω, 1 W resistor.

⁸ No damage occurs if the analog output channels are shorted to ground indefinitely.

⁹ The output terminals of multiple PXIe-5423 waveform generators can be connected together.

¹⁰ Normalized to 50 kHz.

¹¹ With sine frequencies of 40 MHz and ambient temperatures above 45 °C, add ±0.015 dB/°C to the passband flatness specification.

¹² At small amplitudes, average noise density is limited by a -154 dBm/Hz noise floor.

¹³ With 40 MHz carrier and locked to the internal timebase with spurs removed.

¹⁴ With 40 MHz carrier, integrated from 100 Hz to 100 kHz, and locked to the internal timebase.

¹⁵ Used for calculating duty cycle limit: Minimum Duty Cycle = (100% * Minimum On Time) ÷ T_periodand Maximum Duty Cycle = 100% - Minimum Duty Cycle. For more information about the relationship between minimum on/off time and duty cycle specifications, refer to ni.com.

¹⁶ Rise time measured from 10% to 90%.

¹⁷ Integrated from 10 Hz to 10 MHz using a 22 MHz square wave.

¹⁸ At maximum user sample rate.

¹⁹ Relative to 50 kHz and at 2 V_pk-pk and maximum user sample rate.

²⁰ With the digital filter enabled and at -1 dBFS, 2 V_pk-pk, and 200 MS/s. Noise floor is limited by the noise floor of the measurement device.

²¹ With the digital filter enabled and at -7 dBFS, 2 V_pk-pk, and 200 MS/s. Noise floor is limited by the noise floor of the measurement device.

²² If locked to an external Reference Clock source, timebase accuracy is equal to the external Reference Clock accuracy.

²³ Where time drift starts at the latest external calibration date.

²⁴ With a 20 MHz sine wave and both channels configured with the same amplitude.

²⁵ Specifications are valid for any number of PXIe-5423 modules installed in one chassis, with each PXIe-5423 module using a single NI-FGEN session and having all analog parameters set to identical values, and Sample Clock set to 100 MS/s. For other configurations, including multi-chassis systems, contact NI Technical Support at ni.com/support.

²⁶ In frequency list, arbitrary waveform, and arbitrary sequence output modes.

²⁷ Warm up begins after the chassis is powered and the PXIe-5423 is recognized by the host and configured using NI-FGEN. Self-calibration is recommended following the warm-up time.

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