VI-Defined FIFO Configuration
- Updated2025-01-28
- 1 minute(s) read
VI-Defined FIFO Configuration
Represents a VI-defined FIFO. Right-click the node and select Configure to configure the VI-defined FIFO.

Inputs/Outputs
![]() FIFO Out returns the FIFO you specify in the FIFO Properties dialog box. |
Use the Read and Write methods to read from or write to the VI-defined FIFO. FIFOs are initially empty. If you reset the FPGA VI, LabVIEW clears the FIFO.
If you use a VI-defined FIFO in a reentrant FPGA VI, LabVIEW creates a separate copy of the FIFO for each instance of the VI to avoid resource conflicts.
You can create a VI-defined FIFO with the same name as a target-scoped FIFO or DMA FIFO. You also can create VI-defined FIFOs with the same name in different VIs. However, you cannot create multiple VI-defined FIFOs with the same name in the same VI.