Direct Memory Access (DMA) FIFOs
- Updated2023-02-17
- 1 minute(s) read
Direct Memory Access (DMA) FIFOs
Direct Memory Access (DMA) is a type of FIFO-based data transfer between an FPGA target and host processor.
DMA communication consists of two DMA FIFOs: one FIFO on the host computer, and the other FIFO on the FPGA target.
DMA communication provides the following benefits:
- Efficient separation of processing tasks between the FPGA target and host processor, so the host processor remains free to perform operations during data transfer
- FPGA resource savings when transferring arrays of data
- FPGA resource savings by limiting the number of panel controls and indicators shared between a target and host
- Automatic synchronization for data transfers between the host and the FPGA target
You can use DMA communication for the following tasks:
- Transferring waveform data between the FPGA target and host
- Transferring large sets of data
- Data logging in systems where the target and host are continually connected, such as embedded systems
- Running algorithms, like digital signal processing, that the FPGA target processes more efficiently than the host computer
Related Information
- Transferring Data between a Target and Host Using FIFOs
- Data Transfer Using FIFOs
A FIFO is a data structure that holds elements in the order they are received and provides access to those elements using a first-in, first-out basis.
- Storing and Transferring Data
Store and transfer data on an FPGA using resource items like FIFOs, memory items, FPGA registers, or handshake items. You can also transfer data on an FPGA using panel controls or indicators.