cRIO-9053 Specifications
- Updated2024-06-14
- 8 minute(s) read
cRIO-9053 Specifications
Definitions
Warranted specifications describe the performance of a model under stated operating conditions and are covered by the model warranty.
Characteristics describe values that are relevant to the use of the model under stated operating conditions but are not covered by the model warranty.
- Typical specifications describe the performance met by a majority of models.
- Nominal specifications describe an attribute that is based on design, conformance testing, or supplemental testing.
Specifications are Typical unless otherwise noted.
Conditions
Specifications are valid for -20 °C to 55 °C unless otherwise noted.
Processor
CPU | Intel Atom E3805 |
Number of cores | 2 |
CPU frequency | 1.33 GHz |
On-die L2 cache | 1 MB (shared) |
Software
Supported operating system | NI Linux Real-Time (64-bit) | ||||
Supported C Series module programming modes | Real-Time (NI-DAQmx) mode Real-Time Scan (I/O Variables) LabVIEW FPGA | ||||
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Driver software | NI CompactRIO and Drivers 18.1 or later |
Network/Ethernet Port
Number of ports | 1 |
Network interface | 10Base-T, 100Base-TX, and 1000Base-T Ethernet |
Compatibility | IEEE 802.3 |
Communication rates | 10 Mb/s, 100 Mb/s, 1,000 Mb/s, auto-negotiated |
Maximum cabling distance | 100 m/segment |
Network Timing and Synchronization
Protocol | IEEE 802.1AS-2011 IEEE 1588-2008 (default end-to-end profile) |
Supported Ethernet ports | Port 0 |
Network synchronization accuracy | <1 μs |
USB Ports
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SD Association MicroSD Card Slot
MicroSD card support | MicroSD and MicroSDHC standards |
Supported interface speeds | Full speed, high speed, UHS‐I SDR50, and DDR50 |
Memory
Nonvolatile memory (SSD) | 4 GB |
Nonvolatile memory (SSD) type | Planar SLC NAND |
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Reconfigurable FPGA
FPGA type | Xilinx Artix-7 A50T |
Number of flip-flops | 65,200 |
Number of 6-input LUTs | 32,600 |
Number of DSP slices (18 × 25 multipliers) | 120 |
Available block RAM | 2,700 kbits |
Number of DMA channels | 16 |
Number of logical interrupts | 32 |
Internal Real-Time Clock
Accuracy | 200 ppm; 40 ppm at 25 °C |
Controller PFI 0
Maximum input or output frequency | 1 MHz | ||||||
Cable length | 3 m (10 ft) | ||||||
Cable impedance | 50 Ω | ||||||
PFI 0 connector | SMB | ||||||
Power-on state | High impedance | ||||||
I/O standard compatibility | 5 V TTL | ||||||
I/O voltage protection | ±30 V | ||||||
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Voltage | Minimum | Maximum |
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Positive going threshold | 1.43 V | 2.28 V |
Negative going threshold | 0.86 V | 1.53 V |
Hysteresis | 0.48 V | 0.87 V |
Voltage | Conditions | Minimum | Maximum |
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High | — | — | 5.25 V |
Sourcing 100 μA | 4.65 V | — | |
Sourcing 2 mA | 3.60 V | — | |
Sourcing 3.5 mA | 3.44 V | — | |
Low | Sinking 100 μA | — | 0.10 V |
Sinking 2 mA | — | 0.64 V | |
Sinking 3.5 mA | — | 0.80 V |
Real-Time Streaming Performance
Data throughput is dependent on the application, system, and performance of the removable storage media.
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Real-Time (NI-DAQmx) Mode
The following specifications are applicable for modules and slots programmed in Real-Time (NI-DAQmx) mode. For more information about using modules in LabVIEW FPGA mode or Real-Time Scan (I/O Variables) mode, visit ni.com/r/swsupport.
Analog Input
Input FIFO size | 253 samples per slot |
Maximum sample rate | Determined by the C Series module or modules |
Timing accuracy | 50 ppm of sample rate |
Timing resolution | 12.5 ns |
Number of channels supported | Determined by the C Series module or modules |
Number of hardware-timed tasks | 8 |
Analog Output
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Maximum update rate | 1.6 MS/s |
Timing accuracy | 50 ppm of sample rate |
Timing resolution | 12.5 ns |
Waveform onboard regeneration FIFO | 8,191 samples shared among channels used |
Waveform streaming FIFO | 253 samples per slot |
Digital Waveform
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Timing accuracy | 50 ppm |
Number of digital input hardware-timed tasks | 8 |
Number of digital output hardware-timed tasks | 8 |
General-Purpose Counters/Timers
Number of counters/timers | 4 |
Resolution | 32 bits |
Counter measurements | Edge counting, pulse, semi-period, period, two-edge separation, pulse width |
Position measurements | X1, X2, X4 quadrature encoding with Channel Z reloading; two-pulse encoding |
Output applications | Pulse, pulse train with dynamic updates, frequency division, equivalent time sampling |
Internal base clocks | 80 MHz, 20 MHz, 13.1072 MHz, 12.8 MHz, 10 MHz, 100 kHz |
External base clock frequency | 0 MHz to 20 MHz |
Base clock accuracy | 50 ppm |
Output frequency | 0 MHz to 20 MHz |
Inputs | Gate, Source, HW_Arm, Aux, A, B, Z, Up_Down |
Routing options for inputs | Any module PFI, controller PFI, analog trigger, many internal signals |
FIFO | Dedicated 127-sample FIFO |
Frequency Generator
Number of channels | 1 |
Base clocks | 20 MHz, 10 MHz, 100 kHz |
Divisors | 1 to 16 (integers) |
Base clock accuracy | 50 ppm |
Output | Any controller PFI or module PFI terminal |
Module PFI
Functionality | Static digital input, static digital output, timing input, and timing output |
Timing output sources | Many analog input, analog output, counter, digital input, and digital output timing signals |
Timing input frequency | 0 MHz to 20 MHz |
Timing output frequency | 0 MHz to 20 MHz |
Digital Triggers
Source | Any controller PFI or module PFI terminal |
Polarity | Software-selectable for most signals |
Analog input function | Start Trigger, Reference Trigger, Pause Trigger, Sample Clock, Sample Clock Timebase |
Analog output function | Start Trigger, Pause Trigger, Sample Clock, Sample Clock Timebase |
Counter/timer function | Gate, Source, HW_Arm, Aux, A, B, Z, Up_Down |
Module I/O States
At power-on | Module-dependent. Refer to the documentation for each C Series module. |
Time-Based Triggers and Timestamps
Number of time-based triggers | 5 | ||||||
Number of timestamps | 6 | ||||||
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CMOS Battery
Typical battery life with power applied to power connector | 10 years |
Typical battery life when stored at temperatures up to 25 °C | 3.66 years |
Typical battery life when stored at temperatures up to 85 °C | 3.20 years |
Battery
Replace the battery with the following battery or an equivalent one.
Manufacturer | Rayovac |
Model | BR2032 |
Quantity | 1 |
Cell chemistry system | Lithium carbon mono-fluoride (BR) |
IEC number | BR2032 |
Minimum reverse charge current | 3 mA |
Power Requirements
Voltage input range (measured at the cRIO-9053 power connector) | 9 V DC to 30 V DC |
Maximum power consumption | 30 W |
Typical standby power consumption | 3.4 W at 24 V DC input |
Recommended power supply | 60 W, 24 V DC |
EMC ratings for voltage input as described in IEC 61000 | Short lines, long lines, and DC distributed networks |
Power input connector | 2-position, 3.5 mm pitch, pluggable screw terminal with screw locks, Sauro CTF02BV8-AN000A |
Physical Characteristics
Weight (unloaded) | 1,148 g (2 lb 9 oz) | ||||||||||||||||||||
Dimensions (unloaded) | 221.4 mm × 82.5 mm × 189.6 mm (8.72 in. × 3.25 in. × 3.53 in.) | ||||||||||||||||||||
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Insulation rating | 300 V, maximum |
Safety Voltages
V terminal to C terminal | 30 V, maximum |
Chassis ground to C terminal | 30 V, maximum |
Environmental Characteristics
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Ingress protection | IP40 | ||||||||||||
Pollution Degree | 2 | ||||||||||||
Maximum altitude | 5,000 m | ||||||||||||
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To meet these shock and vibration specifications, you must panel mount the system.
In This Section
- Definitions
- Conditions
- Processor
- Software
- Network/Ethernet Port
- Network Timing and Synchronization
- USB Ports
- SD Association MicroSD Card Slot
- Memory
- Reconfigurable FPGA
- Internal Real-Time Clock
- Controller PFI 0
- Real-Time Streaming Performance
- Real-Time (NI-DAQmx) Mode
- CMOS Battery
- Battery
- Power Requirements
- Physical Characteristics
- Safety Voltages
- Environmental Characteristics