ATCA-3671 Specifications

Definitions

Warranted specifications describe the performance of a model under stated operating conditions and are covered by the model warranty.

Characteristics describe values that are relevant to the use of the model under stated operating conditions but are not covered by the model warranty.

  • Typical specifications describe the performance met by a majority of models.
  • Nominal specifications describe an attribute that is based on design, conformance testing, or supplemental testing.

Specifications are Typical unless otherwise noted.

Conditions

Specifications are valid at 23 °C unless otherwise noted.

Reconfigurable FPGA

FPGA

4x Virtex-7 XC7VX690T

FPGA Resources

Note The following specifications apply to each FPGA.

LUTs

433,200

DSP48 slices (25 × 18 Multiplier)

3,600

Embedded block RAM

52,920 kb

Default timebase

100 MHz

Timebase reference sources

Onboard 100 MHz oscillator

Timebase accuracy

±100 ppm, 250 ps peak-to-peak jitter

Data transfers

DMA, interrupts, programmed I/O

Number of DMA channels

64

FPGA Digital Input/Output

Note The following specifications apply to each FPGA.
External GPIO

Number of channels

10

Maximum I/O data rate

100 Mb/s

I/O compatibility

3.3 V, single-ended

ESD

IEC 61000-4-2 (ESD) ± 30 kV (contact)

Inter-FPGA

Number of channels[1]1 There are nine differential pairs to each of the other three FPGAs on the board.

27

Maximum I/O data rate

1 Gb/s

I/O compatibility

1.8 V, LVDS

Onboard DRAM

Note The following specifications apply to each FPGA.

Memory size

16 GB (two 8 GB DIMMs)

Theoretical maximum data rate

21 GB/s

Jitter Cleaning Dual Phase Locked Loop (PLL)

Note The following specifications apply to each FPGA.

Clock Jitter Cleaner

TI LMK04808B

VCXO frequency

122.88 MHz

Number of clock sources from FPGA

1

Number of MGT reference clock outputs

8

Number of SMA external clock outputs

1

Inter-FPGA High-Speed Serial Transceivers

Number of lanes to adjacent (ring) FPGAs

16

Number of lanes to diagonal FPGA

12

Maximum data rate

12.5 Gb/s

Note Each FPGA has a serial connection to two adjacent (ring) FPGAs and one diagonal FPGA.

FPGA CLK/TRIG

Table 1. FPGA Clock/Trigger Input
Name Input Location Destination Use Cases Input P2P Skew Max CLK Rate
SYNC BACKPLANE A/B On-board (backplane) Global (all FPGAs) Clocks/Trigger 900 ps 125 MHz
SYNC FRONT PANEL A/B SMA Global (all FPGAs) Clocks/Trigger 100 ps 312.5 MHz
GCLK0-3 On-board (FPGA) Programmable (all FPGAs) Clocks/Trigger 1,550 ps 312.5 MHz
FPGA IN/OUT A-D SMA Single FPGA Clocks/Trigger 500 ps 2 Absolute delay varies across the FPGA input/outputs. [2] 312.5 MHz
MGT REF SMA Global (all FPGAs) Clocks 200 ps 312.5 MHz
FMC CLK SMA Global (all FMCs) Clocks 100 ps
Table 2. FPGA Clock/Trigger Output
Name Output Driver Destination Use Cases Output P2P Skew Max CLK Rate
SYNC BACKPLANE A/B FPGA Backplane Clocks/Trigger 600 ps 125 MHz
GCLK0-3 FPGA Programmable (all FPGAs) Clocks/Trigger 1,550 ps 312.5 MHz
FPGA IN/OUT A-D FPGA SMA Clocks/Trigger 500 ps [2] 312.5 MHz

Power

Maximum Power Requirements

Note Power requirements are dependent on the adapter modules installed and the contents of the FPGA application.

Power supply

-48 V

Current

9 A

Maximum Working Voltage

Note Maximum working voltage refers to the signal voltage plus the common-mode voltage.

Channel-to-earth

0 V to 3.3 V, Measurement Category I

Channel-to-channel

0 V to 3.3 V, Measurement Category I

Caution Do not use this device for connecting to signals in Measurement Categories II, III, or IV.
Note Measurement Categories CAT I and CAT O are equivalent. These test and measurement circuits are not intended for direct connection to the MAINS building installations of Measurement Categories CAT II, CAT III, or CAT IV.

ATCA-3671 Front Panel

Figure 1. ATCA-3671 Front Panel


  1. Red LED
  2. Green LED
  3. Blue LED
Note The signal pins of this product's input/output ports can be damaged if subjected to ESD. To prevent damage, turn off power to the product before connecting cables and employ industry-standard ESD prevention measures during installation, maintenance, and operation.
Table 3. ATCA-3671 Front Panel Connectors
Connector Description
JC OUT Conditioned output clock for CPRI and clock distribution applications.
CLK IN/OUT General purpose clock to and from the FPGA.
AIO Daughtercards for RF front-ends and high-bandwidth expansion modules.
GPIO Low speed, parallel I/O expansion to your module.
SYNC Low skew trigger and clock distribution to FPGAs.
AIO CLK Direct clock distribution to AIO modules.
JTAG JTAG/UART access for system debugging and management.
1Gb ETH Network connection to ATCA-3671 controller.
MGT REF Clock input for GTH reference on FPGAs.
Notice Connections that exceed any of the maximum ratings of any connector on the ATCA-3671 can damage the device and the chassis. NI is not liable for any damage resulting from such connections.
Table 4. ATCA-3671 Front Panel LEDs
Color State Indication
Green Blinking The module is not fully powered on.
Solid The module is ready for use.
Red Blinking A fault has occurred on the board.
Solid The power has failed.
Blue Blinking The module is powering on or there has been a failure.
Solid The module is fully powered off. It is safe to remove the ATCA-3671 from the chassis.
Note When the LED lights are all off, the module is not active.

GPIO Connector Pinout

Table 5. ATCA-3671 GPIO Connector Pin Assignments
AUX I/O Connector Pin Signal Signal Description


1 GND Bidirectional single-ended (SE) digital I/O (DIO) data channel.
2 FP_GPIO_CONN0 Ground reference for signals.
3 GND Bidirectional SE DIO data channel.
4 GND Bidirectional SE DIO data channel.
5 FP_GPIO_CONN1 Ground reference for signals.
6 GND Ground reference for signals.
7 GND Bidirectional SE DIO data channel.
8 FP_GPIO_CONN2 Ground reference for signals.
9 FP_GPIO_CONN3 Bidirectional SE DIO data channel.
10 GND Bidirectional SE DIO data channel.
11 FP_GPIO_CONN4 Ground reference for signals.
12 FP_GPIO_CONN5 Bidirectional SE DIO data channel.
13 GND Bidirectional SE DIO data channel.
14 FP_GPIO_CONN6 Bidirectional SE DIO data channel.
15 FP_GPIO_CONN7 Bidirectional SE DIO data channel.
16 FP_GPIO_CONN8 Bidirectional SE DIO data channel.
17 FP_GPIO_CONN9 Ground reference for signals.
18 VCC_GPIO +5 V Power (<1.0 A).
19 GND Ground reference for signals.
Notice The GPIO connector accepts a standard, third-party Mini HDMI cable, but the GPIO port is not a Mini HDMI interface. Do not connect the ATCA-3671 to another device using the GPIO port as a Mini HDMI connection. NI is not liable for any damage resulting from such signal connections.
Note The maximum GPIO speed is 10 MHz.

Physical Characteristics

Dimensions (not including connectors)

31.1 cm × 35.2 cm × 6.2 cm (12.3 in. × 13.9 in. × 2.5 in.)

Weight

4.5 kg (10.0 lbs)

Notice Clean the hardware with a soft, nonmetallic brush. Make sure that the hardware is completely dry and free from contaminants before returning it to service.

Environment

Ambient temperature range 0 °C to 40 °C (tested in accordance with IEC 60068-2-1 and IEC 60068-2-2)
Maximum altitude 2,000 m (800 mbar) (at 25 °C ambient temperature)
Pollution Degree 2

Indoor use only.

Operating Environment

Operating temperature range

Used with a Single-Module ATCA Chassis

0 °C to 25 °C

Used with a 14-Slot ATCA Chassis

dependent on final system installation

Relative humidity range

10% to 90%, noncondensing (tested in accordance with IEC 60068-2-56)

Note Operating temperatures are only valid when the ATCA-3671 module is used with the specified chassis.

Compliance and Certifications

Safety Compliance Standards

This product is designed to meet the requirements of the following electrical equipment safety standards for measurement, control, and laboratory use:

  • IEC 61010-1, EN 61010-1
  • UL 61010-1, CSA C22.2 No. 61010-1
Note For safety certifications, refer to the product label or the Product Certifications and Declarations section.

Electromagnetic Compatibility

This product meets the requirements of the following EMC standards for electrical equipment for measurement, control, and laboratory use:
  • EN 61326-1 (IEC 61326-1): Class A emissions; Basic immunity
  • EN 55011 (CISPR 11): Group 1, Class A emissions
  • EN 55022 (CISPR 22): Class A emissions
  • EN 55024 (CISPR 24): Immunity
  • AS/NZS CISPR 11: Group 1, Class A emissions
  • AS/NZS CISPR 22: Class A emissions
  • FCC 47 CFR Part 15B: Class A emissions
  • ICES-001: Class A emissions
Note In the United States (per FCC 47 CFR), Class A equipment is intended for use in commercial, light-industrial, and heavy-industrial locations. In Europe, Canada, Australia, and New Zealand (per CISPR 11), Class A equipment is intended for use only in heavy-industrial locations.
Note Group 1 equipment (per CISPR 11) is any industrial, scientific, or medical equipment that does not intentionally generate radio frequency energy for the treatment of material or inspection/analysis purposes.
Note For EMC declarations, certifications, and additional information, refer to the Product Certifications and Declarations section.

CE Compliance

This product meets the essential requirements of applicable European Directives, as follows:

  • 2014/35/EU; Low-Voltage Directive (safety)
  • 2014/30/EU; Electromagnetic Compatibility Directive (EMC)

Product Certifications and Declarations

Refer to the product Declaration of Conformity (DoC) for additional regulatory compliance information. To obtain product certifications and the DoC for NI products, visit ni.com/product-certifications, search by model number, and click the appropriate link.

Environmental Management

NI is committed to designing and manufacturing products in an environmentally responsible manner. NI recognizes that eliminating certain hazardous substances from our products is beneficial to the environment and to NI customers.

For additional environmental information, refer to the Engineering a Healthy Planet web page at ni.com/environment. This page contains the environmental regulations and directives with which NI complies, as well as other environmental information not included in this document.

EU and UK Customers

  • Waste Electrical and Electronic Equipment (WEEE)—At the end of the product life cycle, all NI products must be disposed of according to local laws and regulations. For more information about how to recycle NI products in your region, visit ni.com/environment/weee.
  • 电子信息产品污染控制管理办法(中国RoHS)

  • 中国RoHSNI符合中国电子信息产品中限制使用某些有害物质指令(RoHS)。关于NI中国RoHS合规性信息,请登录 ni.com/environment/rohs_china。(For information about China RoHS compliance, go to ni.com/environment/rohs_china.)
  • 1 There are nine differential pairs to each of the other three FPGAs on the board.

    2 Absolute delay varies across the FPGA input/outputs.