From 11:00 PM CDT Friday, Nov 8 - 2:30 PM CDT Saturday, Nov 9, ni.com will undergo system upgrades that may result in temporary service interruption.
We appreciate your patience as we improve our online experience.
From 11:00 PM CDT Friday, Nov 8 - 2:30 PM CDT Saturday, Nov 9, ni.com will undergo system upgrades that may result in temporary service interruption.
We appreciate your patience as we improve our online experience.
PXIe,x8 Gen 3 KU15P FPGA,8 GB DRAM PXI FPGA模块,用于FlexRIO—PXIe-7986具有一个LabVIEW可编程的Xilinx Kintex UltraScale KU15P FPGA,采用夹层连接器接口,用于连接基于FlexRIO模块开发套件而开发的自定义I/O。mezzanine连接器接口具有八个Xilinx GTY收发仪,用于数据移动,以及用于配置、时钟和触发的低电压差分信号(LVDS)和单端通用输入/输出(GPIO)。PXIe-7986还配有一个包含8个单端GPIO的辅助I/O连接器,用于数字通信和触发,同时还具有4个Xilinx GTH收发仪,能够以每通道(lane)高达16 Gbps的速率传输数据。