This document contains the VeriStand 2019 R3 known issues that were discovered before and since the release of VeriStand 2019 R3. Known issues are performance issues or technical bugs that NI has acknowledged exist within this version of the product.
Not every issue known to NI appears on this list; it is intended to show the most severe and common issues that you may encounter and provide workarounds when possible. Other technical issues that you may encounter could occur through normal product use or system compatibility issues. You may find more information on these issues in NI’s Product Documentation, Knowledgebase, or Community.
Bug ID | Legacy ID | Description | Details |
---|---|---|---|
917145 | 720821 | System Definition File Error Using Inline Timing and Sync Custom DeviceWhen using the Custom Device Template Tool to create an Inline Timing and Sync Custom Device, importing the device creates a "Timing Source Init VI_1" section in the System Definition XML. This section causes error -307832 when adding the Inline Timing and Sync Custom Device. Workaround: Open the VeriStand project's .nivssdf file with a text editor, and delete the "Timing Source Init VI_1" section. | Reported Version: Resolved Version: Added: |
917158 | 572887 | Setting the Frame Type Option in the Raw Data Frame Configuration Page Has no EffectAs the frame type is pulled from the XNET database, the system definition setting does not affect the XNET configuration. Workaround: Set the frame type in the XNET database. Do not use the Raw Data Frame Type Configuration option in the system definition. | Reported Version: Resolved Version: Added: |
917213 | 522678 | Adding an FPGA Target to the System Definition via the API Will Fail to Add the Parameters Section of PWM ChannelsWhen using the System Definition API to add an FPGA target to a system definition file, the Parameters section typically included with PWM channels is excluded. Workaround: Add the FPGA target manually to the system definition using System Explorer. | Reported Version: Resolved Version: Added: |
959045 | Old Screens Fail to Load if They Have a RT Sequence Control Using ParametersWorkaround: Recreate the screen. | Reported Version: Resolved Version: Added: | |
959051 | RT Sequence Control in a Cluster Interaction Causes VeriStand UI to CrashAfter saving and closing a project with a RT Sequence Control in a cluster, opening the project and interacting with that control will cause the VeriStand UI crash. Workaround: Do not place a RT Sequence Control in a cluster. | Reported Version: Resolved Version: Added: |
Issues found in this section will not be listed in future known issues documents for this product.
There are currently no issues to list.