| ID | Fixed Issue |
|---|---|
|
710205 |
The RIO Resource (FPGA) serial number can be seen in NI-MAX as a property of the FPGA, and can also be queried in LabVIEW using the System Configuration API. The FPGA serial number on some cRIO-905x can eumerate as 0xFFFFFFFF. This does not affect the controller's serial number, which returns the correct value (and matches what is printed on the label). |
| 710783 |
If the arrangement of Host Memory Buffers in your LabVIEW Project Explorer are not in alphabetical order, the references used by Real-Time and FPGA will not match. This can result in Real-Time and FPGA VIs accessing different regions of memory, despite using the same Memory Name. |
| 714320 |
cRIO-9037 and cRIO-9032 controllers cannot connect to WiFi networks with hidden SSID, and will lose connection to WiFi networks if the SSID is hidden while the cRIO is connected. |
| 660557 |
When using a Host Memory Buffer and a Host to Target DMA FIFO simultaneously, the Host Memory Buffer's Retrieve method on FPGA can incorrectly return data sent by the FIFO. This does not affect the FIFO's data in any way. |
| 711209 |
If you already have CompactRIO 18.0 or 18.1 installed prior to performing the Windows 10 1703 update ("Creators Update"), the USBLAN driver may stop functioning. The USBLAN driver is what CompactRIO uses to emulate an Ethernet port when you plug a RIO controller in via USB. With this issue, the USBLAN driver does not work and therefore Windows will not associate the RIO controller you plug in. The device might show as "Generic Usb-EEM Network Adapter" in Windows Device Manager. If you did not have CompactRIO installed prior to the Windows update and install it afterward, you will not experience this issue. |
| 674572 |
When performing network device discovery from a Linux RT operating system, the lvrt process can occasionally crash. Examples of discovery include a call to the Initialize Session VI, or the discovery of a network cDAQ. This will only happen in situations where a large number of devices that are discoverable by NI are present on the network. |
| 656544 |
The _Chassis_ and _Slot_ fields appear for both cRIO-903x and cRIO-904x. However, these fields should not be present in this window. The value of "Unknown" in the fields does not indicate that anything is wrong with the FPGA target or communication to the FPGA target. |
| 719209 |
R-Series PXIe Module 100MHz Timebase is not phase locked to PXI_CLK10 |