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The following items are known issues in NI VeriStand 2012 Known Issues List sorted by Date.
| ID | Known Issue | |||||
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| 216736 Return | Model time for an MDL is incorrect Model time for an MDL is incorrect Workaround: Use a Clock block wire to an outport in your model. Then use that output as the time.
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| 222544 Return | Clicking stop on a model control linked to an MDL causes NI VeriStand to crash If you click the stop button of a model control that is mapped to an MDL, NI VeriStand crashes. Workaround: Don't click stop in the model. Instead, stop the simulation from NI VeriStand.
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| 222645 Return | VeriStand cannot import MDLs with ports inside a block with a name starting with a number VeriStand cannot import MDLs with NI VerIStand inports or outports inside a block that starts with a number. Workaround: Rename the subsystem to not have a number at the beginning of its name.
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| 216044 Return | Unable to run more than 7 models compiled with MS Visual Studio C++ 2008 on a multi-core target Deploying a system with multiple models built from Matlab with VS 2008 C++ compiler (professional or express) causes the RT target to hang at the "Launching Models..." stage after rebooting. Workaround: Use Visual Studio C 6.0 or 2003.
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| 216610 Return | Importing a .mdl file slows significantly with larger models If you try to import a .mdl file with a large number of parameters and signals, the import will be increasingly slower and may lead to a crash. Workaround: Consider breaking model into smaller components.
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| 241320 Return | Lvmodel fails to initialize with error 1003 When deploying a lvmodel to a target without LabVIEW Control Design and Simulation Module the model fails to initialize with error 1003. Workaround: Either install LabVIEW Control Design and Simulation Module support on the RT target or reboot the target after deployment.
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| 279698 Return | DAQ DO doesn't update if an FPGA personality is also present When you have a system definition with both a DAQ and an FPGA card, the digital output of the DAQ board doesn't update. Workaround: 1) Unset the FPGA board as chassis master. Visit the controller page and set it to auto-timing which will use the MHz timing source. 2) Include an AI or AO channel to the DAQ configuration
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| 286798 Return | Repeatly opening and closing a project in VeriStand 2010 cuases a memory leak The size of the NI VeriStand.exe grows in memory when opening/closing a project which eventually slows down edit-time performance. Workaround: Occasionally close VeriStand to remove these memory allocations.
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| 303844 Return | Cannot open a sequence by double clicking Sequence Call in the test project Cannot open a sequence by double clicking Sequence Call in the test project Workaround: N/A
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| 309162 Return | Cannot multi select steps by holding down shift You cannot highlight multiple items in the sequence editor. Workaround: N/A
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| 309168 Return | Double clicking a stimulus file on disk with an editor already open, opens a brand new editor window Double clicking a stimulus file on disk with an editor already open, opens a brand new editor window Workaround: N/A
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| 310588 Return | Reflective memory channels are not scalable Reflective memory channels are not scalable Workaround: Use a calculated channel or model to scale them.
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| 316610 Return | Model parameters do not show up in the model calibration control in offline mode Model parameters do not show up in the model calibration control in offline mode Workaround: Launch the Model Parameter Manager Workspace Tool and then map the parameters.
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| 316678 Return | Multi Task in stimulus profile sometimes gets duplicated when you try to collapse it Multi Task in stimulus profile sometimes gets duplicated when you try to collapse it Workaround: N/A
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| 317883 Return | Using % in a block name causes a The MathWorks Inc. Simulink® model to fail to build Using % in a block name causes a The MathWorks Inc. Simulink® model to fail to build Workaround: Do not use % in the block name.
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| 319481 Return | Remote Event Frames are filtered out in Veristand Frames without channels in the system explorer are not added to the session. This makes it so an Event Remote frame cannot be used without creating a custom device to handle it. Workaround: N/A
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| 319988 Return | XNET Database Editor throws error if there is a '.' in the name of the .dbc file If you attempt to open a DBC file with a '.' in the name of the file in the XNET Database Editor in Veristand you may see the following error: " The Database specified could not be loaded, either it does not exist or it is not a valid XNET Database." Workaround: Follow these steps 1) Open XNET Database Editor outside of Veristand 2) Import DBC File 3) Hit OK and View DBC file with corrected ALIAS
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| 321998 Return | Reflective memory in a system adds significant CPU overhead Adding reflective memory into a system definition adds significant CPU overhead and decreases the maximum rate achievable by the Primary Control Loop Workaround: N/A
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| 329546 Return | If DAQmx driver is installed on target after VeriStand Error -88717 may occur on reboot If DAQmx driver is installed on target after VeriStand Error -88717 may occur on reboot Workaround: Remove all software on the target - Install just LVRT and DAQmx (make sure the target resets after this) - Install VeriStand engine
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| 332403 Return | Channel Faults between serial models do not apply correctly If a channel fault is applied to the output of the first model or the input of the second model of two mapped models in serial execution order then the channel fault is not applied. Workaround: N/A
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| 339518 Return | XNET Device Driver fails to deploy after formatting controller After deploying a Veristand system definition containing XNET if the controller is reformatted but the system definition is unchanged subsequent deployments will fail with an error similar to "NI VeriStand: The specified Device Driver VI was not found at the following path: C:\ni-rt\NIVeriStand\XNET\NI-XNET.llb\NI-XNET.vi" Workaround: Change the system definition such that it needs to be saved. Save and re-deploy the system definition.
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| 346463 Return | Undeploying a project immediately after deployment can cause hang If you attempt to undeploy a project immediately after deploying it Veristand can hang. Workaround: Delay between deployment and undeployment
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| 348497 Return | Interacting with Veristand while instrumented through the API can cause Veristand to hang Using the mouse or keyboard to interact with Veristand while it is being instrument through external API code can cause Veristand to hang. Workaround: Don't use mouse or keyboard to interact with Veristand while its operation is being instrumented through external API code
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| 348534 Return | Workspace graph does not function on Windows XP if no network connection is available Workspace graph does not function on some Windows XP computers if no network connection is available Workaround: Install the microsoft loopback adapter: http://support.microsoft.com/kb/839013 or connect the computer to another network.
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| 349731 Return | Veristand cannot built model from LabVIEW if VI contains static reference to a shared variable Veristand cannot built model from LabVIEW if VI contains static reference to a shared variable. Error 1003 will be displayed. Workaround: Use programmatic access for shared variables
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| 360521 Return | XNET Bus Monitor uses the wrong network adapter if there are multiple adapters on a machine When using a development computer with multiple network interface cards it's possible that the VeriStand XNET Bus Monitor will listen on the wrong network adapter. Workaround: Disable the network interface card that is not used with NI VeriStand.
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| 387298 Return | VISA Error -1073807192 thrown on launching Hardware Discovery Wizard for target with Reflective Memory VISA Error -1073807192 is thrown on launching Hardware Discovery Wizard for target with Reflective Memory Workaround: In MAX, go to the Software section for the target. Browse to NI Visa and select the VISA options tab on that page. Add the IP of the host PC to the Remote Access List.
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| 386381 Return | The Pulse Measurement task may return incorrect data In certain configurations where the signal is disconnected or has a 0/100% duty cycle, the Pulse Measurement task may report invalid readings. The returned reading of the disconnected signal will be the last non 0/100% duty cycle processed by your device. Workaround: Install NI DAQmx 9.7 drivers
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| 385803 Return | CAN Data Replay Requires Trigger Channel be specified CAN Data Replay will not work correctly if a trigger channel is not specified. Workaround: NA
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| 383092 Return | Streaming a large number of waveform graphs can cause VeriStand gateway to stop responding Streaming a large number of waveforms to the waveform graph can cause the VeriStand gateway to be overwhelmed and stop responding in a timely fashion. Workaround: Reduce CPU usage on the gateway computer or stream fewer waveforms.
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| 382480 Return | Setting Counter Output Pulse Generation to a Duty Cycle of 0 or 100 Causes Error Setting the duty cycle of a pulse generation output to 0 or 100 will cause an error and cause the VeriStand Engine to shut down. Workaround: Set the duty cycle to the next closest value supported by the specific DAQ card being used.
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| 382087 Return | Channel Fault Manager does not work if one target is disconnected Channel Fault Manager does not work if one target is disconnected Workaround: NA
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| 381933 Return | Recursive call of nivsseq can cause Stimulus Prifle Editor to crash If a nivsseq refereneces itself it can cause the Stimulus Profile Editor to crash when it is opened Workaround: Open the XML of the nivsseq and delete the recursive reference
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| 369187 Return | Importing XNET Database fails when signal and frame have same name but different capitalization Importing XNET Database fails when signal and frame have same name but different capitalization. Importing frames will fail with error 1077 stating that there is an invalid signal. Workaround: Make signal and frame capitalization match or use different names for signals and frames
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Document last updated on 2/1/2013