Archived: NI-RIO 3.1.1 Known Issues

Updated Mar 10, 2020

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Overview

This document has been archived and is no longer updated by National Instruments.

This document contains the NI-RIO 3.1.1 known issues that were discovered before and since the release of NI-RIO 3.1.1. Not every issue known to NI will appear on this list; it is intended to only show the severe and more common issues that can be encountered. Each Issue appears as a row in the table and includes an issue title, a brief description of the problem, any workarounds that might help resolve the issue, and the date the issue was added to the document (not the reported date). The workarounds that appear in the document are not always tested by NI and are not guaranteed to resolve the issue. If a workaround refers you to the NI KnowledgeBase, please visit www.ni.com/kb/ and enter that KB number in the search field to locate the specific document. The brief description given does not necessarily describe the problem in full detail, and it is expected that you might want more information on an issue. If you would like more information on an issue feel free to contact NI and referencing the ID number given in the document. You can contact us through any of the normal support channels including phone, email, or the discussion forums. See www.ni.com/ask to contact us. Also consider contacting us if you find a workaround for an issue that is not listed in the document so that we can add the workaround to the document.

Glossary of Terms

Known Issues

The following items are known issues in NI-RIO 3.1.1.

Known Issues with NI-RIO 3.1.1 and LabVIEW 8.6.x
116620	—	NiRioScanInterface DMA Channel is listed when using Scan Interface along with LabVIEW FPGA Host Interface
4K1CDCMA	—	DMA from the host to the FPGA target on the cRIO-9002/9004
132979	—	Reading Empty Target to Host DMA FIFO Gradually Starves CPU in built LabVIEW RT executables on cRIO targets
131654	—	Cannot Deploy Scan Interface Modules or IO Variables with Non-ASCII Characters
135570	—	Abort and Reset Methods do not execute on incoming error

Known Issues with NI-RIO 3.1.1 and LabVIEW 8.5.x
4K1CDCMA	—	DMA from the host to the FPGA target on the cRIO-9002/9004
—	—	VIs that use the calibration API should be modified to use the RIO Device I/O control
40243	—	FPGA code generation into an existing host VI is very slow in FPGA Wizard
—	—	Large configuration files load slowly in the FPGA Wizard
—	—	Maximum Time I/O rate values is 70 kHz for FPGA Wizard
—	—	Selecting external clock requires external clock source in FPGA Wizard
114569	—	NI-RIO 3.1.1 does not install support for the NI 987x serial modules for LabVIEW 8.5.x

Known Issues with NI-RIO 3.1.1 and LabVIEW 8.2.x
4G3AED20	—	FPGA I/O Property Node returns wrong value for Module Model Code of NI 9217 module
4DAEDMLX	—	Read/Write Controls execute more slowly after upgrade to NI-RIO 2.4.1 or later
4K1CDCMA	—	DMA from the host to the FPGA target on the cRIO-9002/9004
3VKDOURY	—	DMA in parallel While Loops

ID	Known Issue
Known Issues with NI-RIO 3.1.1 and LabVIEW 8.6.x
116620	NiRioScanInterface DMA Channel is listed when using Scan Interface along with LabVIEW FPGA Host Interface When using Scan Inteface along with LabVIEW FPGA Host Interface, DMA FIFO method nodes display internal Scan Interface DMA Channels Workaround—N/A Date Added—01/15/2009 Return to top
4K1CDCMA	DMA from the host to the FPGA target on the cRIO-9002/9004 DMA is not supported from the host to the FPGA target on the cRIO-9002/9004. LabVIEW returns an error if you try to output DMA from the cRIO-9002/9004. Workaround—N/A Date Added—01/15/2009 Return to top
132979	Reading Empty Target to Host DMA FIFO with Timeout Set to Zero Gradually Starves CPU in built LabVIEW RT executables on cRIO targets In built LabVIEW RT applications on cRIO, if a Target to Host DMA FIFO read executes with a timeout of zero and the FIFO is empty a processor leak occurs that increases the CPU usage on the controller. Workaround— Read zero elements to find elements remaining, instead of using a zero timeout Date Added—01/15/2009 Return to top
131654	Cannot Deploy Scan Interface Modules or IO Variables with Non-ASCII Characters When deploying Scan Interface Modules or IO Variables with Non-ASCII characters such as Chinese or Japanese Characters it will report that the Deployment Completed with Errors. Workaround— Rename any Scan Interface Modules or IO Variables using Alpha Numeric Characters. Date Added—01/15/2009 Return to top
135570	Abort and Reset Methods do not execute on incoming error If an error is passed to either the Abort or Reset Methods, they will not execute and the error will be passed through Workaround---Check, report, and clear errors manually in any error clusters wired to an Abort or Reset; otherwise, do not pass error clusters to these methods Date Added—2/13/09 Return to top
Known Issues with NI-RIO 3.1.1 and LabVIEW 8.5.x
4K1CDCMA	DMA from the host to the FPGA target on the cRIO-9002/9004 DMA is not supported from the host to the FPGA target on the cRIO-9002/9004. LabVIEW returns an error if you try to output DMA from the cRIO-9002/9004. Workaround—N/A Date Added—01/15/2009 Return to top
--	VIs that use the calibration API should be modified to use the RIO Device I/O control Applications from versions of LabVIEW older than 8.5.x that use 783XR Calibration - Open FPGA VI Reference.vi should be updated to use the RIO Device I/O control instead of the VISA I/O control. Workaround—N/A Date Added—01/15/2009 Return to top
40243	FPGA code generation into an existing host VI is very slow in FPGA Wizard If you use the FPGA Wizard to generate code, open the host VI, then generate code into the same VI, the code generation goes very slowly. Workaround—N/A Date Added—01/15/2009 Return to top
- -	Large configuration files load slowly in FPGA Wizard Opening a large FPGA Wizard configuration file can take several minutes. Workaround—N/A Date Added—01/15/2009 Return to top
--	Maximum Timed I/O rate value is 70 kHz in FPGA Wizard generated code The maximum rate you can set for the Single Point Timed I/O timing engine on the Single Point Timed configuration page is 70 kHz. The maximum rate achievable varies with different hardware devices. Workaround—N/A Date Added—01/15/2009 Return to top
--	Selecting external clock requires external clock source with FPGA Wizard If you select External for the Clock Type on the Single Point Timed or Buffered DMA Input configuration page and you do not have an external clock source connected, LabVIEW appears to hang when you run the generated host VI. Press the Global Stop button to stop the VI or add an external clock source to resume running the VI. Workaround—N/A Date Added—01/15/2009 Return to top
114569	NI-RIO 3.1.1 does not install support for the NI 987x serial modules for LabVIEW 8.5.x For serial module support in LabVIEW 8.5 download and install the C-Series Serial Software installer. NI-RIO 3.1.1 will install support for the NI 987x serial modules for LabVIEW 8.6.x. Workaround—Install C-Series Serial Software from the installer linked above. Date Added—01/15/2009 Return to top
Known Issues with NI-RIO 3.1.1 and LabVIEW 8.2.x
4G3AED20	FPGA I/O Property Node returns wrong value for Module Model Code of NI 9217 module The FPGA I/O Property Node returns the value 9217, which is the Product ID, not the Module Model Code, of the NI 9217. The Module Model Code is 0x712B. Workaround—Look for 9217 in applications looking for the Product ID in LabVIEW 8.2.x Date Added—01/15/2008 Return to top
4DAEDMLX	Read/Write Controls execute more slowly after upgrade to NI-RIO 2.4.1 or later Read/Write Control now uses a Call Library Function Node to call the RIO driver. The Call Library Function Node executes additional code if debugging is enabled. To restore the performance to the original level, you must disable debugging in any VIs that contain Read/Write Controls. Workaround— You can disable debugging in a VI by going to File»VI Properties»Execution and unchecking Allow debugging. Date Added—01/15/2009 Return to top
4K1CDCMA	DMA from the host to the FPGA target on the cRIO-9002/9004 DMA is not supported from the host to the FPGA target on the cRIO-9002/9004. LabVIEW returns an error if you try to output DMA from the cRIO-9002/9004. Workaround—N/A Date Added—01/15/2009 Return to top
3VKDOURY	DMA in parallel While Loops If you use DMA in parallel While Loops either on the cRIO-9002/9004 or while accessing the FPGA target across a network, one of the While Loops might hang while the other executes. Workaround—N/A Date Added—01/15/2009 Return to top

Glossary of Terms

Bug ID - When an issue is reported to NI, you may be given this ID or find it on ni.com. You may also find IDs posted by NI on the discussion forums or in KnowledgeBase articles.
Legacy ID – An older issue ID that refers to the same issue. You may instead find this issue ID in older known issues documents.
Description - A few sentences which describe the problem. The brief description given does not necessarily describe the problem in full detail.
Workaround - Possible ways to work around the problem.
Reported Version - The earliest version in which the issue was reported.
Resolved Version - Version in which the issue was resolved or was no longer applicable. "N/A" indicates that the issue has not been resolved.
Date Added - The date the issue was added to the document (not the reported date).

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