Home Shop NI Services Education Services Customer Education Courses Developing Custom FPGA Code Using LabVIEW FPGA Course Overview

Developing Custom FPGA Code Using LabVIEW FPGA Course Overview

Developing Custom FPGA Code Using LabVIEW FPGA course delivers a learning experience for designing, prototyping, and deploying reliable LabVIEW FPGA code for your application. At the end of the course, you will be able to translate your embedded system requirements into a scalable software architecture, choose appropriate methods for inter-process communication, design, deploy and replicate your FPGA code for your embedded application.

Available in the following formats:

 

On-demand

Access course

 

Virtual training not available for this course

 

Classroom training not available for this course

 

Private training not available for this course

Course Objectives:

  • Design, prototype, and deploy LabVIEW FPGA code.

  • Acquire and generate analog and digital signals, control timing, and implement signal processing on FPGA.

  • Explore functionalities for maximum performance and reliability using the LabVIEW FPGA Module.

  • Explore debugging, benchmarking, and testing your LabVIEW FPGA application.

Course Details

Duration

  • On-Demand: 5 hours

Audience

  • Engineers interested on LabVIEW FPGA development, debugging and troubleshooting.

Prerequisites

  • LabVIEW Core 1 and LabVIEW Core 2

NI Products Used

  • LabVIEW Professional Development System

  • LabVIEW FPGA Module

  • LabVIEW Real-Time Module

  • NI CompactRIO Controller

  • NI Analog Input, Analog Output, Thermocouple Input, and Digital Output modules

Cost in Credits

  • On-Demand: Included with software subscription and enterprise agreements, or 5 Education Services Credits, or 2 Training Credits

Developing Custom FPGA Code Using LabVIEW FPGA Course Outline

LessonOverviewTopics

Introduction to FPGA

Learn about how FPGA works and its components.
  • Introduction to FPGA 
  • FPGA Components
Exploring LabVIEW FPGA ModuleLearn about how to work with FPGAs in LabVIEW and the communication method between the FPGA and the host.
  • Developing an FPGA VI 
  • Interactive Front Panel Communication
Selecting Execution ModeLearn about different execution modes in LabVIEW FPGA.
  • Selecting an Execution Mode
Compiling FPGA VILearn about compilation details for FPGA VI.
  • Compiling an FPGA VI

Exploring Compilation Considerations 

Learn about FPGA compilation details and basic optimizations. 

  • Exploring Additional Compilation Options
  • Exploring LabVIEW FPGA Code Optimizations

Configuring FPGA I/O 

Explore techniques to access and control I/O of the FPGA VI. 

  • Configuring FPGA I/O

Exploring LabVIEW FPGA IO Types 

Explore available FPGA I/O types and techniques to manage errors on the FPGA. 

  • Exploring Data Types in LabVIEW FPGA
  • Handling FPGA I/O Errors

Controlling Loop Execution Rates 

Explore techniques to control the timing of the FPGA VI. 

  • Setting Loop Execution Rates

Synchronizing C Series Modules 

Explore the synchronization methods for C Series modules. 

  • Synchronization Considerations

Timing Considerations for LabVIEW FPGA VI 

Explore and use the timing functions for different purposes.   

  • Creating Delays between Events
  • Measuring Time between Events
  • Benchmarking Loop Periods

Exploring the Fixed-Point Data Type 

Learn how to use fixed-point data type.  

  • Using Fixed-Point Data Type

Exploring the Single-Precision Floating-Point Data Type 

Explore the characteristics and usage of Single-Precision Floating-Point data type. 

  • Using Single-Precision Floating-Point Data Type

Reviewing Additional Signal Processing Options in LabVIEW FPGA 

Explore built-in or external functions to process signals with the FPGA. 

  • Performing FPGA Math & Analysis
  • Integrating Third-Party Intellectual Property (IP)

Exploring Parallel Loops on LabVIEW FPGA 

Explore parallel loops, performance considerations, and how to communicate between loops running in the FPGA. 

  • Exploring Parallel Loops on FPGA

Transferring Latest Data (Tag) from FPGA to RT

Use tags to transfer the latest data points and explore the tag communication mechanisms. 

  • Transferring Latest Data from FPGA to RT

Transferring Buffered Data (Stream, Message from LabVIEW FPGA to RT) 

Use streams and messages to transfer multiple data points and explore the communication mechanisms for their implementation. 

  • Transferring Buffered Data (Stream, Message)

Deploying FPGA VI 

Explore different methods to deploy the FPGA bitfile. 

  • Deploying an FPGA VI

Transferring Latest Data in LabVIEW FPGA 

Use tags to transfer the latest data points and explore the tag communication mechanisms. 

  • Transferring Latest Data (Tag)

Transferring Buffered Data in LabVIEW FPGA 

Use streams and messages to transfer multiple data points and explore the communication mechanisms for their implementation. 

  • Transferring Buffered Data (Stream, Message)

RT to FPGA Synchronization and Health Monitoring 

Explore how to synchronize the VIs and usage of watchdogs in the FPGA. 

  • Synchronizing the RT VI and FPGA VI
  • Exploring an FPGA Watchdog

Exploring FPGA Optimizations for FPGA Code 

Explore the techniques used to optimize the size the code takes in the FPGA and the throughput of the FPGA. 

  • Optimization Use Cases
  • Optimization Techniques for FPGA Size
  • Optimization Techniques for Speed/Throughput

Exploring Single-Cycle Timed Loop Execution 

Learn how to optimize the code execution with Single-Cycle Timed Loops (SCTL). 

  • Exploring SCTL Principles

Timing Considerations Using SCTLs 

Learn how to optimize the code execution with single-cycle timed loops. 

  • Executing Code in Single-Cycle Timed Loops

Troubleshooting and Optimizing Code on SCTL 

Learn about optimizations for the FPGA performance and resource usage. 

  • Troubleshooting Code inside SCTL
  • Optimizing Code Using SCTL

Exploring Pipelining in LabVIEW FPGA 

Learn how to implement pipelining in your FPGA VI. 

  • Implementing Pipelining

Exploring Four-Wire Handshaking​ 

Explore the four-wire handshaking optimization to improve throughput.​ 

  • Exploring Different Techniques to Implement Four-Wire Handshaking in LabVIEW FPGA

Debugging and Testing FPGA Code​ 

Explore testing and debugging techniques in the FPGA.​ 

  • Exploring Techniques to Debug and Test LabVIEW FPGA Code

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