cRIO-9040 Specifications
- Updated2024-06-14
- 11 minute(s) read
cRIO-9040 Specifications
Definitions
Warranted specifications describe the performance of a model under stated operating conditions and are covered by the model warranty.
Characteristics describe values that are relevant to the use of the model under stated operating conditions but are not covered by the model warranty.
- Typical specifications describe the performance met by a majority of models.
- Nominal specifications describe an attribute that is based on design, conformance testing, or supplemental testing.
Specifications are Typical unless otherwise noted.
Conditions
Specifications are valid for -20 °C to 55 °C unless otherwise noted.
Processor
CPU | Intel Atom E3930 |
Number of cores | 2 |
CPU frequency | 1.3 GHz (base), 1.8 GHz (burst) |
On-die L2 cache | 2 MB |
Software
Supported operating system | NI Linux Real-Time (64-bit) | ||||
Supported C Series module programming modes | Real-Time (NI-DAQmx) Real-Time Scan (I/O Variables) LabVIEW FPGA | ||||
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Driver software | NI CompactRIO Device Drivers December 2017 or later |
Network/Ethernet Port
Number of ports | 2 |
Network interface | 10Base-T, 100Base-TX, and 1000Base-T Ethernet |
Compatibility | IEEE 802.3 |
Communication rates | 10 Mb/s, 100 Mb/s, 1,000 Mb/s, auto-negotiated |
Maximum cabling distance | 100 m/segment |
Network Timing and Synchronization
Protocol | IEEE 802.1AS-2011 IEEE 1588-2008 (default end-to-end profile) |
Supported Ethernet ports | Port 0, port 1 |
Network synchronization accuracy | <1 μs |
RS-232 Serial Port
Maximum baud rate | 115,200 b/s |
Data bits | 5, 6, 7, 8 |
Stop bits | 1, 2 |
Parity | Odd, even, mark, space |
Flow control | RTS/CTS, XON/XOFF, DTR/DSR |
RI wake maximum low level | 0.8 V |
RI wake minimum high level | 2.4 V |
RI overvoltage tolerance | ±24 V |
RS-485 Serial Port
Maximum baud rate | 230,400 b/s |
Data bits | 5, 6, 7, 8 |
Stop bits | 1, 2 |
Parity | Odd, even, mark, space |
Flow control | XON/XOFF |
Wire mode | 4-wire, 2-wire, 2-wire auto |
Isolation voltage | 60 V DC continuous, port to earth ground |
Cable requirement | Unshielded, 30 m maximum length (limited by EMC/surge) |
USB Ports
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DisplayPort over USB Type-C
Maximum resolution | 3840 × 2160 at 60 Hz |
Supported standard | DisplayPort 1.2 |
Supported USB ports | Port 2:
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SD Card Slot
SD card support | SD and SDHC standards |
Supported interface speeds | UHS‐I SDR50 and DDR50 |
Memory
Nonvolatile memory (SSD) | 4 GB |
Nonvolatile memory (SSD) type | Planar SLC NAND |
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Reconfigurable FPGA
FPGA type | Xilinx Kintex-7 7K70T |
Number of flip-flops | 82,000 |
Number of 6-input LUTs | 41,000 |
Number of DSP slices (18 × 25 multipliers) | 240 |
Available block RAM | 4,860 kbits |
Number of DMA channels | 16 |
Number of logical interrupts | 32 |
Internal Real-Time Clock
Accuracy | 200 ppm; 40 ppm at 25 °C |
Controller PFI 0
Maximum input or output frequency | 1 MHz | ||||||
Cable length | 3 m (10 ft) | ||||||
Cable impedance | 50 Ω | ||||||
PFI 0 connector | SMB | ||||||
Power-on state | High impedance | ||||||
I/O standard compatibility | 5 V TTL | ||||||
I/O voltage protection | ±30 V | ||||||
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Voltage | Minimum | Maximum |
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Positive going threshold | 1.43 V | 2.28 V |
Negative going threshold | 0.86 V | 1.53 V |
Hysteresis | 0.48 V | 0.87 V |
Voltage | Conditions | Minimum | Maximum |
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High | — | — | 5.25 V |
Sourcing 100 μA | 4.65 V | — | |
Sourcing 2 mA | 3.60 V | — | |
Sourcing 3.5 mA | 3.44 V | — | |
Low | Sinking 100 μA | — | 0.10 V |
Sinking 2 mA | — | 0.64 V | |
Sinking 3.5 mA | — | 0.80 V |
Real-Time Streaming Performance
Data throughput is dependent on the application, system, and performance of the removable storage media. For information about optimizing data throughput on the cRIO-9040, visit ni.com/r/optdata.
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Real-Time (NI-DAQmx) Mode
The following specifications are applicable for modules and slots programmed in Real-Time (NI-DAQmx) mode. For more information about using modules in LabVIEW FPGA mode or Real-Time Scan (I/O Variables) mode, visit ni.com/r/swsupport.
Analog Input
Input FIFO size | 253 samples per slot |
Maximum sample rate | Determined by the C Series module or modules |
Timing accuracy | 50 ppm of sample rate |
Timing resolution | 12.5 ns |
Number of channels supported | Determined by the C Series module or modules |
Number of hardware-timed tasks | 8 |
Analog Output
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Maximum update rate | 1.6 MS/s |
Timing accuracy | 50 ppm of sample rate |
Timing resolution | 12.5 ns |
Waveform onboard regeneration FIFO | 8,191 samples shared among channels used |
Waveform streaming FIFO | 253 samples per slot |
Digital Waveform
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Timing accuracy | 50 ppm |
Number of digital input hardware-timed tasks | 8 |
Number of digital output hardware-timed tasks | 8 |
General-Purpose Counters/Timers
Number of counters/timers | 4 |
Resolution | 32 bits |
Counter measurements | Edge counting, pulse, semi-period, period, two-edge separation, pulse width |
Position measurements | X1, X2, X4 quadrature encoding with Channel Z reloading; two-pulse encoding |
Output applications | Pulse, pulse train with dynamic updates, frequency division, equivalent time sampling |
Internal base clocks | 80 MHz, 20 MHz, 13.1072 MHz, 12.8 MHz, 10 MHz, 100 kHz |
External base clock frequency | 0 MHz to 20 MHz |
Base clock accuracy | 50 ppm |
Output frequency | 0 MHz to 20 MHz |
Inputs | Gate, Source, HW_Arm, Aux, A, B, Z, Up_Down |
Routing options for inputs | Any module PFI, controller PFI, analog trigger, many internal signals |
FIFO | Dedicated 127-sample FIFO |
Frequency Generator
Number of channels | 1 |
Base clocks | 20 MHz, 10 MHz, 100 kHz |
Divisors | 1 to 16 (integers) |
Base clock accuracy | 50 ppm |
Output | Any controller PFI or module PFI terminal |
Module PFI
Functionality | Static digital input, static digital output, timing input, and timing output |
Timing output sources | Many analog input, analog output, counter, digital input, and digital output timing signals |
Timing input frequency | 0 MHz to 20 MHz |
Timing output frequency | 0 MHz to 20 MHz |
Digital Triggers
Source | Any controller PFI or module PFI terminal |
Polarity | Software-selectable for most signals |
Analog input function | Start Trigger, Reference Trigger, Pause Trigger, Sample Clock, Sample Clock Timebase |
Analog output function | Start Trigger, Pause Trigger, Sample Clock, Sample Clock Timebase |
Counter/timer function | Gate, Source, HW_Arm, Aux, A, B, Z, Up_Down |
Module I/O States
At power-on | Module-dependent. Refer to the documentation for each C Series module. |
Time-Based Triggers and Timestamps
Number of time-based triggers | 5 | ||||||
Number of timestamps | 6 | ||||||
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CMOS Battery
Typical battery life with power applied to power connector | 10 years |
Typical battery life when stored at temperatures up to 25 °C | 7.8 years |
Typical battery life when stored at temperatures up to 85 °C | 5.4 years |
Power Requirements
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Maximum power consumption | 60 W |
Typical standby power consumption | 3.4 W at 24 V DC input | ||||||
Recommended power supply | 100 W, 24 V DC | ||||||
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Power input connector | 4-position, 3.5 mm pitch, pluggable screw terminal with screw locks, Sauro CTF04BV8-AN000A |
Battery
Guidelines
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Physical Characteristics
Weight (unloaded) | 1,800 g (3 lb, 15 oz) | ||||||||||||||||||||
Dimensions (unloaded) | 219.5 mm × 88.1 mm × 121.2 mm (8.64 in. × 3.47 in. × 4.77 in. ) | ||||||||||||||||||||
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Insulation rating | 300 V, maximum |
Safety Voltages
V1 terminal to C terminal | 30 V, maximum |
V2 terminal to C terminal | 30 V, maximum |
Chassis ground to C terminal | 30 V, maximum |
Environmental Characteristics
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Ingress protection | IP20 | ||||||||||||
Pollution Degree | 2 | ||||||||||||
Maximum altitude | 5,000 m | ||||||||||||
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To meet these specifications, you must mount the cRIO-9040 system directly on a flat, rigid surface as described in the user manual, affix ferrules to the ends of the terminal wires, and use retention accessories for the USB 2.0 host port (NI USB Extender Cable, 152166-xx), USB type-C ports (NI Locking USB Cables, 143556-xx; NI USB Extender Cable, 143555-xx; NI USB Display Adapters, 143557-xx or 143558-xx). All cabling should be strain-relieved near input connectors. Take care to not directionally bias cable connectors within input connectors when applying strain relief.
In This Section
- Definitions
- Conditions
- Processor
- Software
- Network/Ethernet Port
- Network Timing and Synchronization
- RS-232 Serial Port
- RS-485 Serial Port
- USB Ports
- DisplayPort over USB Type-C
- SD Card Slot
- Memory
- Reconfigurable FPGA
- Internal Real-Time Clock
- Controller PFI 0
- Real-Time Streaming Performance
- Real-Time (NI-DAQmx) Mode
- CMOS Battery
- Power Requirements
- Physical Characteristics
- Safety Voltages
- Environmental Characteristics