NI PXIe-7822 Specifications
- Updated2025-01-24
- 6 minute(s) read
NI PXIe-7822 Specifications
This document contains the specifications for the NI PXIe-7822. Specifications are typical at 25 °C unless otherwise noted.
NI PXIe-7822
Pinout
Signal | Description |
---|---|
DIO <0...31> | Digital I/O data through channels 0 through 31. |
GND | Ground reference for signals. |
External Clock | External clock input source that can be used for source synchronous acquisitions. The provided clock source must be stable and glitch-free. |
Digital I/O
Number of connectors | 4 |
Number of channels per connector | 32 |
Maximum frequency | 80 MHz |
Compatibility | LVTTL, LVCMOS |
Logic family | Software-selectable |
Default software setting | 3.3 V |
Logic Family | Input Low Voltage (VIL) | Input High Voltage (VIH) | ||
---|---|---|---|---|
Minimum | Maximum | Minimum | Maximum | |
1.2 V | -0.3 V | 0.40 V | 0.84 V | 1.5 V |
1.5 V | -0.3 V | 0.50 V | 1.05 V | 1.8 V |
1.8 V | -0.3 V | 0.60 V | 1.25 V | 2.1 V |
2.5 V | -0.3 V | 0.70 V | 1.70 V | 2.8 V |
3.3 V | -0.3 V | 0.80 V | 2.00 V | 3.6 V |
Input leakage current | ±15 µA maximum |
Input impedance | 50 kΩ typical, pull-down |
Logic Family | Current | Output Low Voltage (VOL) Maximum | Output High Voltage (VOH) Minimum |
---|---|---|---|
1.2 V | 100 µA | 0.20 V | 1.00 V |
1.5 V | 100 µA | 0.20 V | 1.25 V |
1.8 V | 100 µA | 0.20 V | 1.54 V |
2.5 V | 100 µA | 0.20 V | 2.22 V |
3.3 V | 100 µA | 0.20 V | 3.00 V |
4 mA | 0.40 V | 2.40 V |
| |||||||
Output impedance | 50 Ω | ||||||
Programmable, by line | |||||||
Protection[2]2 NI recommends minimizing long-term over/under-voltage exposure to the Digital I/O. Prolonged DC voltage stresses that violate the maximum and minimum digital input voltage ratings may reduce device longevity. Over/under-voltage stresses are considered prolonged if the cumulative time in the abnormal condition exceeds 1 year. | ±20 V, single line | ||||||
Digital I/O voltage selection | Programmable, per connector, and defined at compilation (not run-time configurable) | ||||||
Direction control of digital I/O channels | Per channel | ||||||
Minimum I/O pulse width | 6.25 ns | ||||||
Minimum sampling period | 5 ns |
External Clock
Direction | Input into device |
Maximum input leakage | ±15 µA |
Characteristic impedance | 50 Ω |
Power-on state | Tristated |
Minimum input | -0.3 V |
Maximum input | 3.6 V |
Logic level | Inherited from programmed digital voltage selection per connector |
Maximum input frequency | 80 MHz |
Reconfigurable FPGA
FPGA type | Kintex-7 325T |
Number of flip-flops | 407,600 |
Number of LUTs | 203,800 |
Embedded Block RAM | 16,020 kbits |
Number of DSP48 slices | 840 |
Timebase | 10, 40, 80, 100, 120, 160, or 200 MHz |
Default timebase | 40 MHz |
Timebase reference source | PXI Express 100 MHz (PXIe_CLK100) |
Timebase accuracy | ±100 ppm, 250 ps peak-to-peak jitter |
Data transfers | DMA, interrupts, programmed I/O |
Onboard DRAM
Memory size | 1 Bank; 512 MB |
Maximum theoretical data rate | 800 MB/s streaming |
Synchronization Resources
Input/output source | PXI_Trig<0..7> |
Input source | PXI_Star, PXIe_DStarA, PXIe_DStarB, PXI_Clk10, PXIe_Clk100, External Clock x |
Output source | PXIe_DStarC |
Bus Interface
Form factor | x4 PXI Express, specification v1.0 compliant |
Slot compatibility | x4, x8, and x16 PXI Express or PXI Express hybrid slots |
Data transfers | DMA, interrupts, programmed I/O |
Number of DMA channels | 16 |
Maximum Power Requirements
Power requirements are dependent on the digital output loads and configuration of the LabVIEW FPGA VI used in your application.
+3.3 VDC (±5%) | 3 A |
+12 V | 2 A |
Physical Characteristics
Dimensions | 16 cm by 10 cm (6.3 in. by 3.9 in.) |
Weight | 183 g (0.403 lb) |
I/O connectors | x4 68-pin female high-density VHDCI type |
Environmental
Ambient Operating temperature (IEC 60068-2-1, IEC 60068-2-2) | 0 °C to 55 °C |
Ambient Storage temperature (IEC 60068-2-1, IEC 60068-2-2) | -40 °C to 71 °C |
Operating humidity (IEC 60068-2-56) | 10% RH to 90% RH, noncondensing |
Storage humidity (IEC 60068-2-56) | 5% RH to 95% RH, noncondensing |
Pollution Degree | 2 |
Maximum altitude | 2,000 m at 25 °C |
Indoor use only.
Shock and Vibration
Operational shock | 30 g peak, half-sine, 11 ms pulse (Tested in accordance with IEC 60068-2-27. Meets MIL-PRF-28800F Class 2 limits.) | ||||||
|
Safety Standards
This product meets the requirements of the following standards of safety for electrical equipment for measurement, control, and laboratory use:
- IEC 61010-1, EN 61010-1
- UL 61010-1, CSA 61010-1
- EN 60079-0:2012, EN 60079-15:2010
- IEC 60079-0: Ed 6, IEC 60079-15: Ed 4
- UL 60079-0: Ed 5, UL 60079-15: Ed 3
- CSA 60079-0: 2011, CSA 60079-15: 2012
Electromagnetic Compatibility
This product meets the requirements of the following EMC standards for electrical equipment for measurement, control, and laboratory use:
- EN 61326-1 (IEC 61326-1): Class B emissions; Basic immunity
- EN 55011 (CISPR 11): Group 1, Class B emissions
- EN 55022 (CISPR 22): Class B emissions
- EN 55024 (CISPR 24): Immunity
- AS/NZS CISPR 11: Group 1, Class B emissions
- AS/NZS CISPR 22: Class B emissions
- FCC 47 CFR Part 15B: Class B emissions
- ICES-001: Class B emissions
CE Compliance 
- 2014/35/EU; Low-Voltage Directive (safety)
- 2014/30/EU; Electromagnetic Compatibility Directive (EMC)
Product Certifications and Declarations
Refer to the product Declaration of Conformity (DoC) for additional regulatory compliance information. To obtain product certifications and the DoC for NI products, visit ni.com/product-certifications, search by model number, and click the appropriate link.
Environmental Management
NI is committed to designing and manufacturing products in an environmentally responsible manner. NI recognizes that eliminating certain hazardous substances from our products is beneficial to the environment and to NI customers.
For additional environmental information, refer to the Engineering a Healthy Planet web page at ni.com/environment. This page contains the environmental regulations and directives with which NI complies, as well as other environmental information not included in this document.
EU and UK Customers
电子信息产品污染控制管理办法(中国RoHS)
NI Services
Visit ni.com/support to find support resources including documentation, downloads, and troubleshooting and application development self-help such as tutorials and examples.
Visit ni.com/services to learn about NI service offerings such as calibration options, repair, and replacement.
Visit ni.com/register to register your NI product. Product registration facilitates technical support and ensures that you receive important information updates from NI.
NI corporate headquarters is located at 11500 N Mopac Expwy, Austin, TX, 78759-3504, USA.
1 Tristate by default
2 NI recommends minimizing long-term over/under-voltage exposure to the Digital I/O. Prolonged DC voltage stresses that violate the maximum and minimum digital input voltage ratings may reduce device longevity. Over/under-voltage stresses are considered prolonged if the cumulative time in the abnormal condition exceeds 1 year.
In This Section
- NI PXIe-7822
Pinout
- Digital I/O
- External Clock
- Reconfigurable FPGA
- Onboard DRAM
- Synchronization Resources
- Bus Interface
- Maximum Power Requirements
- Physical Characteristics
- Environmental
- Shock and Vibration
- Safety Standards
- Electromagnetic Compatibility
- CE Compliance
- Product Certifications and Declarations
- Environmental Management
- EU and UK Customers
- 电子信息产品污染控制管理办法(中国RoHS)
- NI Services