Clocks

Clocking is used to control the rate at which signals are generated.

An internal voltage-controlled crystal oscillator (VCXO) behaves as a sample clock timebase for the signal generator. This sample clock timebase in the PXIe-5433 is either configured or replaced by using one of the following methods:
  • Internal sample clock
  • Reference clock
Figure 9. PXIe-5433 Clocking

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The PXIe-5433 supports the following clocking options:
  • None, OnboardRefClk, OnboardReferenceClk, or OnboardReferenceClock
  • PXI_Clk or PXIe_Clk100

Internal Sample Clock

The internal sample clock timebase is used to determine clocking rates. In arbitrary waveform mode, you can control this timebase by using high-resolution mode in the PXIe-5433.

The sample clock signals when the DAC converts the digital waveform values to an analog voltage. The PXIe-5433 derives a sample clock from its main internal timing source, the onboard sample clock timebase. The PXIe-5433 uses a high-precision 100 MHz voltage-controlled crystal oscillator (VCXO) clock source for the sample clock timebase.

The sample clock timebase frequency is tuned by an internal calibration DAC control voltage when the Reference Clock Source property or the NIFGEN_ATTR_REFERENCE_CLOCK_SOURCE attribute is set to None. The internal calibration DAC, which is calibrated at the factory and which you also can calibrate, tunes the sample clock timebase to maintain a high quality frequency source.

The PXIe-5433 supports high-resolution and automatic clock mode and does not support external sample clock sources.

Clock Mode

The clock mode is applicable only when using an internal sample clock. The clock mode determines the method of deriving the sample clock from the sample clock timebase—the main timing component of the instrument. You can set the clock mode with the Clock Mode property or the NIFGEN_ATTR_CLOCK_MODE attribute.

High-Resolution Clock Mode

High-resolution clocking allows you to set the sample clock frequency to any value from zero to the instrument sample clock timebase frequency with a very fine resolution typically in the millihertz or microhertz range. This mode is useful for applications that require a precise clock source.

Automatic Clock Mode

In automatic clock mode, NI-FGEN switches between divide-down and the high-resolution clock modes depending on the sample rate configured with the Sample Rate property or the NIFGEN_ATTR_ARB_SAMPLE_RATE attribute. Because the PXIe-5433 does not support divide-down, NI-FGEN always selects high-resolution in automatic clock mode.

Reference Clock

An external device is used as a reference clock in the phase-locked loop (PLL) of the signal generator. This causes the reference clock to phase-lock to the sample clock timebase so that the frequency stability and accuracy of the sample clock timebase matches that of the reference clock.

The PXIe-5433 uses either the onboard reference clock, that is a temperature-compensated crystal oscillator (TCXO), or the PXIe_CLK100 backplane line as the reference clock source. The source provides the control voltage that tunes the VCXO of the sample clock timebase to match the frequency stability and accuracy of the reference clock source for internal clock update sources using a phase-locked loop (PLL).

The process is as follows:

  1. The phase comparator compares the selected reference clock to the 100 MHz clock of the sample clock timebase to begin the PLL.
  2. A control voltage proportional to the phase difference between the two clocks is developed and used to tune the sample clock timebase into alignment with the reference clock.
  3. The sample clock timebase output is routed back to the phase comparator, and the loop is closed.

You can synchronize the PXIe-5433 with other instruments using PXIe_CLK100 as the reference clock source and NI-TClk.