PXIe-5122 Specifications
- Updated2023-02-19
- 15 minute(s) read
PXIe-5122 Specifications
Definitions
Warranted specifications describe the performance of a model under stated operating conditions and are covered by the model warranty. Warranted specifications account for measurement uncertainties, temperature drift, and aging. Warranted specifications are ensured by design or verified during production and calibration.
Characteristics describe values that are relevant to the use of the model under stated operating conditions but are not covered by the model warranty.
- Typical specifications describe the performance met by a majority of models.
- Nominal specifications describe an attribute that is based on design, conformance testing, or supplemental testing.
- Measured specifications describe the measured performance of a representative model.
Specifications are Typical unless otherwise noted.
Conditions
Specifications are valid under the following conditions unless otherwise noted.
- All filter settings
- All impedance selections
- Sample clock set to 100 MS/s
Vertical
Analog Input
Number of channels | Two (simultaneously sampled) |
Connectors | BNC |
Impedance and Coupling
Input impedance (software-selectable) | 50 Ω ± 2.0% 1 MΩ ± 0.75% in parallel with a nominal capacitance of 29 pF |
Input coupling (software-selectable) | AC[1] DC GND |
Voltage Levels
Range (Vpk-pk) | Vertical Offset Range | |
---|---|---|
50 Ω Input | 1 MΩ Input | |
0.2 V | ±0.1 V | |
0.4 V | ±0.2 V | |
1 V | ±0.5 V | |
2 V | ±1 V | |
4 V | ±2 V | |
10 V | — | ±5 V |
20 V (1 MΩ only) | — | — |
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Accuracy
Resolution | 14 bits |
Input Range (Vpk-pk) | DC Accuracy |
---|---|
0.2 V and 0.4 V | ±(0.65% of input + 1.0 mV) |
1 V | ±(0.65% of input + 1.2 mV) |
2 V | ±(0.65% of input + 1.6 mV) |
4 V and 10 V | ±(0.65% of input + 8.0 mV) |
20 V (1 MΩ only) | ±(0.65% of input + 13.0 mV) |
Programmable vertical offset accuracy[3] | ±0.4% of offset setting, Warranted |
Input Range (Vpk-pk) | 50 Ω and 1 MΩ |
---|---|
0.2 V, 0.4 V, 1 V, and 2 V | ±(0.057% of input + 0.006% of FS + 100 μV) per °C |
4 V, 10 V | ±(0.057% of input + 0.006% of FS + 900 µV) per °C |
20 V (1 MΩ only) |
Bandwidth and Transient Response
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AC coupling cutoff (-3 dB)[8] | 12 Hz |
Filter Settings | Input Range (Vpk-pk) | 50 Ω and 1 MΩ |
---|---|---|
Filters off | 0.2 V |
±0.4 dB (DC to 20 MHz) ±1 dB (20 MHz to 40 MHz) |
All other input ranges |
±0.4 dB (DC to 20 MHz) ±1.0 dB (20 MHz to 50 MHz) |
|
Anti-alias filter on | All ranges |
±1.2 dB (DC to 16 MHz) ±1.6 dB (16 MHz to 32 MHz) |
Spectral Characteristics
Range (Vpk-pk) | 50 Ω | 1 MΩ |
---|---|---|
0.2 V | 75 dBc | 70 dBc |
0.4 V | 75 dBc | 70 dBc |
1 V | 75 dBc | 70 dBc |
2 V | 75 dBc | 70 dBc |
4 V | 65 dBc | 70 dBc |
10 V | 65 dBc | 60 dBc |
20 V | — | 60 dBc |
Range (Vpk-pk) | 50 Ω | 1 MΩ |
---|---|---|
0.2 V | -75 dBc | -68 dBc |
0.4 V | -75 dBc | -68 dBc |
1 V | -75 dBc | -68 dBc |
2 V | -73 dBc | -68 dBc |
4 V | -63 dBc | -68 dBc |
10 V | -63 dBc | -58 dBc |
20 V | — | -58 dBc |
Intermodulation distortion[12] | -75 dBc |
Range (Vpk-pk) | 50 Ω | 1 MΩ | ||
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Filters Off | Anti-alias Filter On | Filters Off | Anti-alias Filter On | |
0.2 V | 60 dB | 60 dB | 56 dB | 60 dB |
0.4 V | 62 dB | 62 dB | 61 dB | 62 dB |
1 V | 62 dB | 62 dB | 62 dB | 62 dB |
2 V | 62 dB | 62 dB | 62 dB | 62 dB |
4 V | — | — | 61 dB | 62 dB |
Range (Vpk-pk) | 50 Ω | 1 MΩ | ||
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Filters Off | Anti-alias Filter On | Filters Off | Anti-alias Filter On | |
0.2 V | 60 dB | 60 dB | 56 dB | 59 dB |
0.4 V | 62 dB | 62 dB | 60 dB | 61 dB |
1 V | 62 dB | 62 dB | 61 dB | 61 dB |
2 V | 62 dB | 62 dB | 61 dB | 61 dB |
4 V | — | — | 60 dB | 61 dB |
Range (Vpk-pk) | 50 Ω | 1 MΩ |
---|---|---|
0.2 V | 46 µVrms (0.023% FS) | 60 µVrms (0.030% FS) |
0.4 V | 92 μVrms (0.023% FS) | 92 μVrms (0.023% FS) |
1 V | 230 μVrms (0.023% FS) | 230 μVrms (0.023% FS) |
2 V | 460 μVrms (0.023% FS) | 460 μVrms (0.023% FS) |
4 V | 920 μVrms (0.023% FS) | 920 μVrms (0.023% FS) |
10 V | 2.3 mVrms (0.023% FS) | 2.3 mVrms (0.023% FS) |
20 V | — | 4.6 mVrms (0.023% FS) |
Range (Vpk-pk) | 50 Ω | 1 MΩ |
---|---|---|
0.2 V | 66 µVrms (0.033% FS) | 80 µVrms (0.040% FS) |
0.4 V | 100 μVrms (0.025% FS) | 120 μVrms (0.030% FS) |
1 V | 250 μVrms (0.025% FS) | 300 μVrms (0.030% FS) |
2 V | 500 μVrms (0.025% FS) | 600 μVrms (0.030% FS) |
4 V | 1 mVrms (0.025% FS) | 1.2 mVrms (0.030% FS) |
10 V | 2.5 mVrms (0.025% FS) | 3 mVrms (0.030% FS) |
20 V | — | 6 mVrms (0.030% FS) |
Range (Vpk-pk) | 50 Ω | 1 MΩ |
---|---|---|
0.2 V | 66 µVrms (0.033% FS) | 110 μVrms (0.055% FS) |
0.4 V | 100 μVrms (0.025% FS) | 160 μVrms (0.040% FS) |
1 V | 250 μVrms (0.025% FS) | 300 μVrms (0.030% FS) |
2 V | 500 μVrms (0.025% FS) | 600 μVrms (0.030% FS) |
4 V | 1 mVrms (0.025% FS) | 1.6 mVrms (0.040% FS) |
10 V | 2.5 mVrms (0.025% FS) | 3 mVrms (0.030% FS) |
20 V | — | 6 mVrms (0.030% FS) |
Horizontal
Sample Clock
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Onboard Clock (Internal VCXO)
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Phase noise density[18] | <-100 dBc/Hz at 100 Hz <-120 dBc/Hz at 1 kHz <-130 dBc/Hz at 10 kHz | ||||||
Sample clock jitter[19] | ≤1 psrms (100 Hz to 100 kHz) ≤2 psrms (100 Hz to 1 MHz) | ||||||
Timebase frequency | 100 MHz | ||||||
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Sample clock delay range | ±1 Sample clock period | ||||||
Sample clock delay/adjustment resolution | ≤10 ps |
External Sample Clock
Sources | CLK IN (front panel SMB connector) PXI Star Trigger (backplane connector) |
Frequency range[20] | 30 MHz to 105 MHz (CLK IN) 30 MHz to 80 MHz (PXI Star Trigger) |
Duty cycle tolerance | 45% to 55% |
Sample Clock Exporting
Phase-Locked Loop (PLL) Reference Clock
Sources | PXI_CLK10 (backplane connector) CLK IN (front panel SMB connector) |
Frequency range[22] | 5 MHz to 20 MHz in 1 MHz increments |
Duty cycle tolerance | 45% to 55% |
Exported reference clock destinations | CLK OUT (front panel SMB connector) PFI <0..1> (front panel 9-pinmini-circular DIN connector) PXI_Trig <0..7> |
CLK IN (Sample Clock and Reference Clock Input)
Connector | SMB jack | ||||||
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Maximum input overload | 7 Vrms with |Peaks| ≤10 V | ||||||
Impedance | 50 Ω | ||||||
Coupling | AC |
CLK OUT (Sample Clock and Reference Clock Output)
Connector | SMB jack |
Output impedance | 50 Ω |
Logic type | 3.3 V CMOS |
Maximum drive current | ±48 mA |
Trigger
Reference (Stop) Trigger
Trigger types | Edge Window Hysteresis Video Digital Immediate Software | ||||||||||||||||||
Trigger sources | CH 0 CH 1 TRIG PXI_Trig <0..6> PFI <0..1> Software | ||||||||||||||||||
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Analog Trigger
Trigger types | Edge Window Hysteresis | ||||||
Sources | CH 0 (front panel BNC connector) CH 1 (front panel BNC connector) TRIG (front panel BNC connector) | ||||||
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Trigger level resolution | 10 bits (1 in 1,024) | ||||||
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Trigger jitter | ≤80 psrms [25] | ||||||
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Digital Trigger
Trigger type | Digital |
Sources | PXI_Trig <0..6> (backplane connector) PFI <0..1> (front panel SMB connector) |
Video Trigger
Trigger type | Video |
Sources | CH 0 (front panel BNC connector) CH 1 (front panel BNC connector) TRIG (front panel BNC connector) |
Video trigger types | Specific line Any line Specific field |
Standards | Negative sync of NTSC, PAL, or SECAM signal |
External Trigger
Connector | TRIG (front panel BNC connector) |
Impedance | 1 MΩ in parallel with 22 pF |
Coupling | AC DC |
AC-coupling cutoff (-3 dB) | 12 Hz |
Input voltage range | ±5 V |
Maximum input overload | |Peaks| ≤42 V |
Programmable Function Interface (PFI 0 and PFI 1)
Connector | AUX I/O (9-pin mini-circular DIN) | ||||||||||||||
Direction | Bi-directional | ||||||||||||||
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Waveform
Memory per Channel | Samples per Channel | Maximum Number of Records in Onboard Memory |
---|---|---|
8 MB (standard option) | 4 MS | 16,384 |
64 MB | 32 MS | 100,000[] |
256 MB | 128 MS | 100,000[] |
Minimum record length | 1 sample |
Number of pretrigger samples | Zero up to full record length[28] |
Number of posttrigger samples | Zero up to full record length[28] |
Allocated onboard memory per record | (Record Length × 2 bytes/S) + 480 bytes, rounded up to next multiple of 128 bytes or 512 bytes, whichever is greater |
Calibration
External Calibration
External calibration calibrates the VCXO and the voltage reference. All calibration constants are stored in nonvolatile memory.
Self-Calibration
Self-calibration is done on software command. The calibration corrects for gain, offset, frequency response, triggering, and timing adjustment errors for all input ranges.
Calibration Specifications
Interval for external calibration | 2 years |
Warm-up time[29] | 15 minutes |
Software
Driver Software
Driver support for this device was first available in NI-SCOPE3.3.1.
NI-SCOPE is an IVI-compliant driver that allows you to configure, control, and calibrate the PXIe-5122. NI-SCOPE provides application programming interfaces for many development environments.
Application Software
NI-SCOPE provides programming interfaces, documentation, and examples for the following application development environments:
- LabVIEW
- LabWindows™/CVI™
- Measurement Studio
- Microsoft Visual C/C++
- .NET (C# and VB.NET)
Interactive Soft Front Panel and Configuration
When you install NI-SCOPE on a 64-bit system, you can monitor, control, and record measurements from the PXIe-5122 using InstrumentStudio.
InstrumentStudio is a software-based front panel application that allows you to perform interactive measurements on several different device types in a single program.
Interactive control of the PXIe-5122 was first available via InstrumentStudio in NI-SCOPE2018 and via the NI-SCOPE SFP in NI-SCOPE2.7. InstrumentStudio and the NI-SCOPE SFP are included on the NI-SCOPE media.
NI Measurement & Automation Explorer (MAX) also provides interactive configuration and test tools for the PXIe-5122. MAX is included on the driver media.
TClk Specifications
You can use the NI TClk synchronization method and the NI-TClk driver to align the Sample clocks on any number of supported devices, in one or more chassis. For more information about TClk synchronization, refer to the NI-TClk Synchronization Help, which is located within the NI High-Speed Digitizers Help. For other configurations, including multichassis systems, contact NI Technical Support at ni.com/support.
Intermodule SMC Synchronization Using NI-TClk for Identical Modules
- PXI-5122 modules installed in one NI PXI-1042 chassis, or PXIe-5122 modules installed in one PXI Express chassis.
- All parameters set to identical values for each SMC-based module.
- Sample clock set to 100 MS/s and all filters disabled.
Power
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Total power | 29.28 W, typical 33.12 W, maximum |
Dimensions and Weight
Dimensions | 3U, one-slot, PXI Express module 21.3 cm × 2.0 cm × 13.0 cm (8.4 in. × 0.8 in. × 5.1 in.) |
Weight | 453 g (16.0 oz) |
Environment
Maximum altitude | 2,000 m (800 mbar) (at 25 °C ambient temperature) |
Pollution Degree | 2 |
Indoor use only.
Operating Environment
Ambient temperature range | 0 °C to 55 °C |
Relative humidity range | 10% to 90%, noncondensing |
Storage Environment
Ambient temperature range | -40 °C to 71 °C |
Relative humidity range | 5% to 95%, noncondensing |
Shock and Vibration
Operating shock | 30 g peak, half-sine, 11 ms pulse | ||||||
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Compliance and Certifications
Safety Compliance Standards
This product is designed to meet the requirements of the following electrical equipment safety standards for measurement, control, and laboratory use:
- IEC 61010-1, EN 61010-1
- UL 61010-1, CSA C22.2 No. 61010-1
Electromagnetic Compatibility
- EN 61326-1 (IEC 61326-1): Class A emissions; Basic immunity
- EN 55011 (CISPR 11): Group 1, Class A emissions
- EN 55022 (CISPR 22): Class A emissions
- EN 55024 (CISPR 24): Immunity
- AS/NZS CISPR 11: Group 1, Class A emissions
- AS/NZS CISPR 22: Class A emissions
- FCC 47 CFR Part 15B: Class A emissions
- ICES-001: Class A emissions
Product Certifications and Declarations
Refer to the product Declaration of Conformity (DoC) for additional regulatory compliance information. To obtain product certifications and the DoC for NI products, visit ni.com/product-certifications, search by model number, and click the appropriate link.
Environmental Management
NI is committed to designing and manufacturing products in an environmentally responsible manner. NI recognizes that eliminating certain hazardous substances from our products is beneficial to the environment and to NI customers.
For additional environmental information, refer to the Engineering a Healthy Planet web page at ni.com/environment. This page contains the environmental regulations and directives with which NI complies, as well as other environmental information not included in this document.
EU and UK Customers
电子信息产品污染控制管理办法(中国RoHS)
1 AC coupling available on 1 MΩ input only.
2 Programmable vertical offset = 0 V. Within ±5 °C of self-calibration temperature.
3 Within ±5 °C of self-calibration temperature.
4 CH 0 to/from CH 1 and External Trigger to CH 0 or CH 1.
5 Filters off.
6 78 MHz above 40 °C.
7 Only one filter can be enabled at any given time. The anti-alias filter is enabled by default.
8 AC coupling available on 1 MΩ input only.
9 Referenced to 50 kHz.
10 10 MHz, -1 dBFS input signal. Includes the 2nd through the 5th harmonics. Measured from DC to 50 MHz.
11 10 MHz, -1 dBFS input signal. Includes the 2nd through the 5th harmonics.
12 0.2 V to 2.0 V input range. 50 Ω input impedance. Two tones at 10.2 MHz and 11.2 MHz. Each tone is -7 dBFS.
13 10 MHz, -1 dBFS input signal. Excludes harmonics. Measured from DC to 50 MHz.
14 10 MHz, -1 dBFS input signal. Includes harmonics. Measured from DC to 50 MHz.
15 50 Ω terminator connected to input.
16 Internal Sample clock is locked to the Reference clock or derived from the onboard VCXO.
17 Divide by n decimation used for all rates less than 100 MS/s.
18 10 MHz input signal.
19 Includes the effects of the converter aperture uncertainty and the clock circuitry jitter. Excludes trigger jitter.
20 Divide by n decimation available, where 1 ≤ n ≤ 65,535.
21 Decimated Sample clock only.
22 Default of 10 MHz. The PLL Reference clock frequency must be accurate to ±50 ppm.
23 Holdoff set to 0. Onboard Sample clock at maximum rate.
24 TDC is off when using external Sample clock.
25 Within ±5 °C of self-calibration temperature.
26 1 kHz, 50% duty cycle square wave, PFI 1 only.
27 It is possible to exceed this number if you fetch records while acquiring data.
28 Single-record mode and multiple-record mode.
29 Warm-up time begins after the NI-SCOPE driver is loaded. Unless manually disabled, the NI-SCOPE driver automatically loads with the operating system and enables the module.
30 Caused by clock and analog path delay differences. No manual adjustment performed.
31 For information about manual adjustment, refer to the Synchronization Repeatability Optimization topic in the NI-TClk Synchronization Help available at ni.com/manuals. For additional help with the adjustment process, contact NI Technical Support at ni.com/support.