PCI-6254 and PXI-6254 Specifications
- Updated2024-05-10
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PCI-6254 and PXI-6254 Specifications
PCI-6254 and PXI-6254 Pinout
Analog Input
Number of channels | 16 differential or 32 single ended | ||||||
ADC resolution | 16 bits | ||||||
DNL | No missing codes guaranteed | ||||||
INL | Refer to the AI Absolute Accuracy section | ||||||
Single channel maximum | 1.25 MS/s | ||||||
Multichannel maximum (aggregate) | 1.00 MS/s | ||||||
Minimum | No minimum | ||||||
Timing resolution | 50 ns | ||||||
Timing accuracy | 50 ppm of sample rate | ||||||
Input coupling | DC | ||||||
Input range | ±0.1 V, ±0.2 V, ±0.5 V, ±1 V, ±2 V, ±5 V, ±10 V | ||||||
Maximum working voltage for analog inputs (signal + common mode) | ±11 V of AI GND | ||||||
CMRR (DC to 60 Hz) | 100 dB | ||||||
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Input bias current | ±100 pA |
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Small signal bandwidth (-3 dB) | 1.7 MHz |
Input FIFO size | 4,095 samples |
Scan list memory | 4,095 entries |
Data transfers | DMA (scatter-gather), interrupts, programmed I/O |
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Input current during overvoltage condition | ±20 mA maximum/AI pin |
Settling Time for Multichannel Measurements
Range | ±60 ppm of Step (±4 LSB for Full-Scale Step) | ±15 ppm of Step (±1 LSB for Full-Scale Step) |
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±1 V, ±2 V, ±5 V, ±10 V | 1 μs | 1.5 μs |
±0.5 V | 1.5 μs | 2 μs |
±0.1 V, ±0.2 V | 2 μs | 8 μs |
Typical Performance Graphs
AI Absolute Accuracy
Nominal Range Positive Full Scale | Nominal Range Negative Full Scale | Residual Gain Error (ppm of Reading) | Residual Offset Error (ppm of Range) | Offset Tempco (ppm of Range/°C) | Random Noise, σ (μVrms) | Absolute Accuracy at Full Scale (μV) | Sensitivity (μV) |
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10 | -10 | 60 | 20 | 21 | 280 | 1,920 | 112.0 |
5 | -5 | 70 | 20 | 21 | 140 | 1,010 | 56.0 |
2 | -2 | 70 | 20 | 24 | 57 | 410 | 22.8 |
1 | -1 | 80 | 20 | 27 | 32 | 220 | 12.8 |
0.5 | -0.5 | 90 | 40 | 34 | 21 | 130 | 8.4 |
0.2 | -0.2 | 130 | 80 | 55 | 16 | 74 | 6.4 |
0.1 | -0.1 | 150 | 150 | 90 | 15 | 52 | 6.0 |
Gain tempco | 13 ppm/°C |
Reference tempco | 1 ppm/°C |
INL error | 60 ppm of range |
AI Absolute Accuracy Equation
AbsoluteAccuracy = Reading · (GainError) + Range · (OffsetError) + NoiseUncertainty
- GainError = ResidualAIGainError + GainTempco · (TempChangeFromLastInternalCal) + ReferenceTempco · (TempChangeFromLastExternalCal)
- OffsetError = ResidualAIOffsetError + OffsetTempco · (TempChangeFromLastInternalCal) + INLError
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NoiseUncertainty = for a coverage factor of 3 σ and averaging 100 points.
AI Absolute Accuracy Example
Absolute accuracy at full scale on the analog input channels is determined using the following assumptions:
- TempChangeFromLastExternalCal = 10 °C
- TempChangeFromLastInternalCal = 1 °C
- number_of_readings = 100
- CoverageFactor = 3 σ
For example, on the 10 V range, the absolute accuracy at full scale is as follows:
- GainError = 60 ppm + 13 ppm · 1 + 1 ppm · 10 = 83 ppm
- OffsetError = 20 ppm + 21 ppm · 1 + 60 ppm = 101 ppm
- NoiseUncertainty = = 84 µV
- AbsoluteAccuracy = 10 V · (GainError) + 10 V · (OffsetError) + NoiseUncertainty = 1,920 µV
Analog Triggers
Number of triggers | 1 | ||||||
Source | AI <0..31>, APFI <0, 1> | ||||||
Functions | Start Trigger, Reference Trigger, Pause Trigger, Sample Clock, Convert Clock, Sample Clock Timebase | ||||||
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Resolution | 10 bits, 1 in 1,024 |
Modes | Analog edge triggering, analog edge triggering with hysteresis, and analog window triggering |
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Accuracy | ±1% |
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Digital I/O/PFI
Static Characteristics
Number of channels | 48 total, 32 (P0.<0..31>), 16 (PFI <0..7>/P1, PFI <8..15>/P2) |
Ground reference | D GND |
Direction control | Each terminal individually programmable as input or output |
Pull-down resistor | 50 kΩ typical, 20 kΩ minimum |
Input voltage protection | ±20 V on up to two pins[1]1 Stresses beyond those listed under Input voltage protection may cause permanent damage to the device. |
Waveform Characteristics (Port 0 Only)
Terminals used | Port 0 (P0.<0..31>) | ||||||
Port/sample size | Up to 32 bits | ||||||
Waveform generation (DO) FIFO | 2,047 samples | ||||||
Waveform acquisition (DI) FIFO | 2,047 samples | ||||||
DI Sample Clock frequency | 0 MHz to 10 MHz, system and bus activity dependent | ||||||
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Data transfers | DMA (scatter-gather), interrupts, programmed I/O |
DI or DO Sample Clock source[2]2 The digital subsystem does not have its own dedicated internal timing engine. Therefore, a sample clock must be provided from another subsystem on the device or an external source. | Any PFI, RTSI, AI Sample or Convert Clock, Ctr n Internal Output, and many other signals |
PFI/Port 1/Port 2 Functionality
Functionality | Static digital input, static digital output, timing input, timing output |
Timing output sources | Many AI, counter, DI, DO timing signals |
Debounce filter settings | 125 ns, 6.425 µs, 2.56 ms, disable; high and low transitions; selectable per input |
Recommended Operating Conditions
Level | Minimum | Maximum |
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Input high voltage (VIH) | 2.2 V | 5.25 V |
Input low voltage (VIL) | 0 V | 0.8 V |
Output high current (IOH) P0.<0..31> | — | -24 mA |
Output high current (IOH) PFI <0..15>/P1/P2 | — | -16 mA |
Output low current (IOL) P0.<0..31> | — | 24 mA |
Output low current (IOL) PFI <0..15>/P1/P2 | — | 16 mA |
Electrical Characteristics
Level | Minimum | Maximum |
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Positive-going threshold (VT+) | — | 2.2 V |
Negative-going threshold (VT-) | 0.8 V | — |
Delta VT hystersis (VT+ - VT-) | 0.2 V | — |
IIL input low current (Vin = 0 V) | — | -10 µA |
IIH input high current (Vin = 5 V) | — | 250 µA |
Digital I/O Characteristics
General-Purpose Counters/Timers
Number of counter/timers | 2 |
Resolution | 32 bits |
Counter measurements | Edge counting, pulse, semi-period, period, two-edge separation |
Position measurements | X1, X2, X4 quadrature encoding with Channel Z reloading; two-pulse encoding |
Output applications | Pulse, pulse train with dynamic updates, frequency division, equivalent time sampling |
Internal base clocks | 80 MHz, 20 MHz, 0.1 MHz |
External base clock frequency | 0 MHz to 20 MHz |
Base clock accuracy | 50 ppm |
Inputs | Gate, Source, HW_Arm, Aux, A, B, Z, Up_Down |
Routing options for inputs | Any PFI, RTSI, PXI_TRIG, PXI_STAR, analog trigger, many internal signals |
FIFO | 2 samples |
Data transfers | Dedicated scatter-gather DMA controller for each counter/timer; interrupts; programmed I/O |
Frequency Generator
Number of channels | 1 |
Base clocks | 10 MHz, 100 kHz |
Divisors | 1 to 16 |
Base clock accuracy | 50 ppm |
Output can be available on any output PFI or RTSI terminal.
Phase-Locked Loop (PLL)
Number of PLLs | 1 |
Reference signal | PXI_STAR, PXI_CLK10, RTSI <0..7> |
Output of PLL | 80 MHz Timebase; other signals derived from 80 MHz Timebase including 20 MHz and 100 kHz Timebases |
External Digital Triggers
Source | Any PFI, RTSI, PXI_TRIG, PXI_STAR |
Polarity | Software-selectable for most signals |
Analog input function | Start Trigger, Reference Trigger, Pause Trigger, Sample Clock, Convert Clock, Sample Clock Timebase |
Counter/timer function | Gate, Source, HW_Arm, Aux, A, B, Z, Up_Down |
Digital waveform generation (DO) function | Sample Clock |
Digital waveform acquisition (DI) function | Sample Clock |
Device-to-Device Trigger Bus
PCI | RTSI <0..7>[3]3 In other sections of this document, RTSI refers to RTSI <0..7> for the PCI devices or PXI_TRIG <0..7> for PXI devices. |
PXI | PXI_TRIG <0..7>, PXI_STAR |
Output selections | 10 MHz Clock, frequency generator output, many internal signals |
Debounce filter settings | 125 ns, 6.425 μs, 2.56 ms, disable; high and low transitions; selectable per input |
Bus Interface
PCI/PXI | 3.3 V or 5 V signal environment |
DMA channels | 6, can be used for analog input, digital input, digital output, counter/timer 0, counter/timer 1 |
- May be installed in PXI Express hybrid slots
- Or, may be used to control SCXI in PXI/SCXI combo chassis
M Series Part Number | SCXI Control in PXI/SCXI Combo Chassis | PXI Express Hybrid Slot Compatible |
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191325D-02/191325E-03L | No | Yes |
191325C-0x/191325B-0x | Yes | No |
Power Requirements
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Current Limits
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Physical Characteristics
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I/O connectors | Two 68-pin VHDCI |
Calibration
Recommended warm-up time | 15 minutes |
Calibration interval | 2 years |
Maximum Working Voltage
Connect only voltages that are below these limits.
Channel-to-earth | 11 V, Measurement Category I |
Measurement Category I is for measurements performed on circuits not directly connected to the electrical distribution system referred to as MAINS voltage. MAINS is a hazardous live electrical supply system that powers equipment. This category is for measurements of voltages from specially protected secondary circuits. Such voltage measurements include signal levels, special equipment, limited-energy parts of equipment, circuits powered by regulated low-voltage sources, and electronics.
Environmental
Operating temperature | 0 ºC to 55 ºC |
Storage temperature | -20 ºC to 70 ºC |
Humidity | 10% RH to 90% RH, noncondensing |
Maximum altitude | 2,000 m |
Pollution Degree (indoor use only) | 2 |
Indoor use only.
Safety Compliance Standards
This product is designed to meet the requirements of the following electrical equipment safety standards for measurement, control, and laboratory use:
- IEC 61010-1, EN 61010-1
- UL 61010-1, CSA C22.2 No. 61010-1
EMC Standards
This product meets the requirements of the following EMC standards for electrical equipment for measurement, control, and laboratory use:
- EN 61326-1 (IEC 61326-1): Class A emissions; Basic immunity
- EN 55011 (CISPR 11): Group 1, Class A emissions
- EN 55022 (CISPR 22): Class A emissions
- EN 55024 (CISPR 24): Immunity
- AS/NZS CISPR 11: Group 1, Class A emissions
- AS/NZS CISPR 22: Class A emissions
- FCC 47 CFR Part 15B: Class A emissions
- ICES-001: Class A emissions
CE Compliance

This product meets the essential requirements of applicable European Directives, as follows:
- 2014/35/EU; Low-Voltage Directive (safety)
- 2014/30/EU; Electromagnetic Compatibility Directive (EMC)
- 2011/65/EU; Restriction of Hazardous Substances (RoHS)
Product Certifications and Declarations
Refer to the product Declaration of Conformity (DoC) for additional regulatory compliance information. To obtain product certifications and the DoC for NI products, visit ni.com/product-certifications, search by model number, and click the appropriate link.
Environmental Management
NI is committed to designing and manufacturing products in an environmentally responsible manner. NI recognizes that eliminating certain hazardous substances from our products is beneficial to the environment and to NI customers.
For additional environmental information, refer to the Engineering a Healthy Planet web page at ni.com/environment. This page contains the environmental regulations and directives with which NI complies, as well as other environmental information not included in this document.
EU and UK Customers
电子信息产品污染控制管理办法(中国RoHS)
1 Stresses beyond those listed under Input voltage protection may cause permanent damage to the device.
2 The digital subsystem does not have its own dedicated internal timing engine. Therefore, a sample clock must be provided from another subsystem on the device or an external source.
3 In other sections of this document, RTSI refers to RTSI <0..7> for the PCI devices or PXI_TRIG <0..7> for PXI devices.
In This Section
- PCI-6254 and PXI-6254 Pinout
- Analog Input
- Digital I/O/PFI
- General-Purpose Counters/Timers
- Frequency Generator
- Phase-Locked Loop (PLL)
- External Digital Triggers
- Bus Interface
- Power Requirements
- Current Limits
- Physical Characteristics
- Calibration
- Maximum Working Voltage
- Environmental
- Safety Compliance Standards
- EMC Standards
- CE Compliance
- Product Certifications and Declarations
- Environmental Management