The eight PXI bus trigger lines offer the following benefits:

  • Synchronize the opration of several different PXI peripheral devices
  • Have one device control the timed sequences of operations of other devices on in the system

Triggers can be passed from one device to another. This allows for precisely timed responses to monitored or controlled asynchronous external events. The number of triggers that a particular application requires varies with the complexity and number of events involved.

The PXI specification is implemented with the RTSI bus through the PXI trigger lines. PXI specification requires eight lines, PXI_TRIG<0..7>, on the P2/J2 connector of the PXI chassis for the trigger lines. The RTSI features of signal generators is implemented on this sub-bus. RTSI<0..6> are implemented on PXI_TRIG<0..6>, and the RTSI clock is routed on PXI_TRIG7.