Logic Analyzer and Pattern Generator Specifications

Specifications are Typical unless otherwise noted.

Number of channels

16

Maximum sampling rate (per channel)

100 MS/s [1]

Logic level

5 V compatible LVTTL input; 3.3 V LVTTL output

Pull down

1 MΩ

Direction control

Individually programmable as Logic Analyzer or Pattern Generator

Input logic levels
Input low voltage, VIL

Minimum

0 V

Maximum

0.8 V

Input high voltage, VIH

Minimum

2.0 V

Maximum

5.25 V

Output logic levels
Output low voltage, VOL sinking 4 mA

Minimum

0 V

Maximum

0.4 V

Output high voltage, VOH sourcing 4 mA

Minimum

2.4 V

Maximum

3.465 V

Protection

Short-circuit to ground

1

Common Application Rates
  • Monitor: 10 MHz SPI bus with 10 ns timing resolution.
  • Generate: 1 MHz PWM with 1% duty cycle steps.