Block Diagrams

The following figures show the data flow through the NI 6589. Single-ended data lines use standard clock levels to interpret data as either a binary zero or a one in high-speed digital data transfers. Differential data lines provide a low-noise, low-power, low-amplitude differential method for high-speed digital data transfer.

Figure 4. Clock Input Signal


Figure 5. LVDS Data and PFI Lines


Figure 6. Single-Ended PFI Lines


Figure 7. Clock Output Signals


Figure 8. Crosspoint Switch