NI-5793 Specifications
- Updated2024-11-19
- 10 minute(s) read
NI-5793 Specifications
NI-5793
Specifications
Definitions
Warranted specifications describe the performance of a model under stated operating conditions and are covered by the model warranty.
Characteristics describe values that are relevant to the use of the model under stated operating conditions but are not covered by the model warranty.
- Typical specifications describe the performance met by a majority of models.
- Nominal specifications describe an attribute that is based on design, conformance testing, or supplemental testing.
Specifications are Typical unless otherwise noted.
NI-5793 Pinout
Use the pinout to connect to terminals on the NI-5793.
Signal Name | Description |
---|---|
LO OUT | Local oscillator output, +12 dBm maximum, +0 dBm |
CLK IN | Reference Clock input, 50 Ω single-ended, +20 dBm maximum |
CLK OUT | Exported clock output, DC-coupled, 0V to 2V |
LO IN | Local oscillator input, +20 dBm maximum |
TX OUT | Transmit channel, +20 dBm maximum |
AUX I/O | Digital I/O and PFI connector |
AUX I/O Connector
Pin | Signal | Signal Description |
---|---|---|
1 | DIO Port 0 (0) | Bidirectional single-ended (SE) digital I/O (DIO) data channel. |
2 | GND | Ground reference for signals. |
3 | DIO Port 0 (1) | Bidirectional SE DIO data channel. |
4 | DIO Port 0 (2) | Bidirectional SE DIO data channel. |
5 | GND | Ground reference for signals. |
6 | DIO Port 0 (3) | Bidirectional SE DIO data channel. |
7 | DIO Port 1 (0) | Bidirectional SE DIO data channel. |
8 | GND | Ground reference for signals. |
9 | DIO Port 1 (1) | Bidirectional SE DIO data channel. |
10 | DIO Port 1 (2) | Bidirectional SE DIO data channel. |
11 | GND | Ground reference for signals. |
12 | DIO Port 1 (3) | Bidirectional SE DIO data channel. |
13 | PFI 0 | Bidirectional SE DIO data channel. |
14 | NC | No connect. |
15 | PFI 1 | Bidirectional SE DIO data channel. |
16 | PFI 2 | Bidirectional SE DIO data channel. |
17 | GND | Ground reference for signals. |
18 | +5 V | +5 V power (10 mA maximum). |
19 | PFI 3 | Bidirectional SE DIO data channel. |
TX OUT
Amplitude Characteristics
|
Absolute Amplitude Accuracy
Frequency | Temperature 23 °C±5 °C (dB) |
---|---|
>200 MHz to 1 GHz | 0.8 |
1 GHz to 2 GHz | 1.3 |
2 GHz to 3 GHz | 1.3 |
3 GHz to 4.4 GHz | 1.8 |
Noise Density
Frequency | Temperature 23 °C±5 °C(dBm/Hz) |
---|---|
>200 MHz to 1 GHz | -138 |
>1 GHz to 2 GHz | -138 |
>2 GHz to 4.4 GHz | -138 |
Output Voltage Standing Wave Ratio (VSWR)
<2.0 GHz | 1.6:1 |
≥2.0 GHz and <3.0 GHz | 1.4:1 |
≥3.0 GHz | 1.7:1 |
TX OUT Third Order Intermodulation (IP3)
Frequency | Temperature 23 °C ± 5 °C (dBm) |
---|---|
>200 MHz to 1 GHz | 19 |
>1 GHz to 2 GHz | 17 |
>2 GHz to 3 GHz | 13 |
>3 GHz to 3.9 GHz | 11 |
>3.9 GHz to 4.4 GHz | 8 |
Second Order Intermodulation (IP2)
Frequency | Temperature 23 °C ±5 °C (dBm) |
---|---|
>200 MHz to 1 GHz | 25 |
>1 GHz to 2 GHz | 25 |
>2 GHz to 3 GHz | 25 |
>3 GHz to 4.4 GHz | 35 |
TX Sideband Image Suppression
Frequency | Temperature 23 °C ±5 °C (dBc) |
---|---|
>200 MHz to 1 GHz | -50 |
>1 GHz to 2 GHz | -50 |
>2 GHz to 3 GHz | -50 |
>3 GHz to 4.4 GHz | -45 |
TX LO Residual Power
Frequency | Temperature 23 °C ±5 °C (dBm) |
---|---|
>200 MHz to 1 GHz | -48 |
>1 GHz to 2 GHz | -48 |
>2 GHz to 3 GHz | -48 |
>3 GHz to 4.4 GHz | -45 |
LO OUT Front Panel Connector
Frequency range | 200 MHz to 4.4 GHz |
Power | 3 dBm, ±3 dB, nominal |
Output power resolution | 0.15 dB |
Output impedance | 50 Ω, nominal |
Output VSWR | 1.78:1 |
Amplitude settling time | < 0.25 dB in less than 10 ms, typical |
Maximum DC voltage | ±0.5 VDC |
LO IN Front Panel Connector
Frequency range | 200 MHz to 4.4 GHz |
Input power | 3 dBm ±3 dB, nominal |
Input impedance | 50 Ω |
Input VSWR | 1.78:1 |
Absolute maximum power | +15 dBm |
Maximum DC power | ±0.5 VDC |
TX OUT Frequency Characteristics
Frequency range | 200 MHz to 4.4 GHz | ||||||
Instantaneous bandwidth (6 dB) | 200 MHz[1]1 Instantaneous bandwidth is 200 MHz at 6 dB. Instantaneous bandwidth is 130 MHz at 3 dB. | ||||||
Tuning resolution[2]2 Tuning resolution combines LO step size capability and frequency shift DSP implemented on the FPGA. | <250 kHz | ||||||
|
Frequency Settling Time
Settling time[4]4 The settling time specification only includes frequency settling, and it excludes any residual amplitude settling that may occur as a result of large frequency changes. Driver and operating system timing can affect transition times. This specification reflects only hardware settling. | < 50 ms per 100 MHz step |
Phase Noise
Offset Frequency | Loop Phase Noise (dBc/Hz) |
---|---|
1 kHz | -85 |
10 kHz | -95 |
100 kHz | -97 |
1 MHz | -100 |
10 MHz | -110 |
Baseband Characteristics
|
CLK IN Front Panel Connector
| |||||||
| |||||||
Input impedance | 50 Ω, nominal | ||||||
Coupling | AC |
CLK OUT Front Panel Connector
Interface standard | 3.3 V LVCMOS | ||||||||||||||
|
Dimensions and Weight
Dimensions | 12.9 × 2.0 × 12.1 cm (5.1 × 0.8 × 4.7 in) |
Weight | 413 g (14.6 oz) |
I/O | RX in, RX out, LO in, LO out, 10 MHz, 10 MHz out |
Power | 6 W, nominal, with one LO turned on |
AUX I/O (Port 0 DIO <0..3>, Port 1 DIO <0..3>, and PFI <0..3>
Number of channels | 12 bidirectional (8 DIO and 4 PFI) | ||||||||||||||||
Connector type | HDMI | ||||||||||||||||
Interface standard | 3.3 V LVCMOS | ||||||||||||||||
| |||||||||||||||||
Pull-down resistor | 150 kΩ | ||||||||||||||||
Recommended operating voltage | -0.3 V to 3.6 V | ||||||||||||||||
Overvoltage protection | ±10 V | ||||||||||||||||
Maximum toggle frequency | 6.6 MHz | ||||||||||||||||
+5 V maximum power | 10 mA | ||||||||||||||||
+5 V voltage tolerance | 4.2 V to 5 V |
Environment
Maximum altitude | 2,000 m (800 mbar) (at 25 °C ambient temperature) |
Pollution Degree | 2 |
Indoor use only.
Operating Environment
Ambient temperature range | 0 °C to 55 °C |
Relative humidity range | 10% to 90%, noncondensing |
Storage Environment
Ambient temperature range | -40 °C to 70 °C |
Relative humidity range | 5% to 95%, noncondensing |
Shock and Vibration
Operating shock | 30 g peak, half-sine, 11 ms pulse | ||||||
|
Compliance and Certifications
Safety Compliance Standards
This product is designed to meet the requirements of the following electrical equipment safety standards for measurement, control, and laboratory use:
- IEC 61010-1, EN 61010-1
- UL 61010-1, CSA C22.2 No. 61010-1
Electromagnetic Compatibility
- EN 61326-1 (IEC 61326-1): Class A emissions; Basic immunity
- EN 55011 (CISPR 11): Group 1, Class A emissions
- EN 55022 (CISPR 22): Class A emissions
- EN 55024 (CISPR 24): Immunity
- AS/NZS CISPR 11: Group 1, Class A emissions
- AS/NZS CISPR 22: Class A emissions
- FCC 47 CFR Part 15B: Class A emissions
- ICES-001: Class A emissions
Product Certifications and Declarations
Refer to the product Declaration of Conformity (DoC) for additional regulatory compliance information. To obtain product certifications and the DoC for NI products, visit ni.com/product-certifications, search by model number, and click the appropriate link.
Environmental Management
NI is committed to designing and manufacturing products in an environmentally responsible manner. NI recognizes that eliminating certain hazardous substances from our products is beneficial to the environment and to NI customers.
For additional environmental information, refer to the Engineering a Healthy Planet web page at ni.com/environment. This page contains the environmental regulations and directives with which NI complies, as well as other environmental information not included in this document.
EU and UK Customers
电子信息产品污染控制管理办法(中国RoHS)
NI Services
Visit ni.com/support to find support resources including documentation, downloads, and troubleshooting and application development self-help such as tutorials and examples.
Visit ni.com/services to learn about NI service offerings such as calibration options, repair, and replacement.
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NI corporate headquarters is located at 11500 N Mopac Expwy, Austin, TX, 78759-3504, USA.
1 Instantaneous bandwidth is 200 MHz at 6 dB. Instantaneous bandwidth is 130 MHz at 3 dB.
2 Tuning resolution combines LO step size capability and frequency shift DSP implemented on the FPGA.
3 All LO step size specifications are assumed to be with fractional mode enabled and a 100 kHz LO step size.
4 The settling time specification only includes frequency settling, and it excludes any residual amplitude settling that may occur as a result of large frequency changes. Driver and operating system timing can affect transition times. This specification reflects only hardware settling.
5 DACs are dual-channel components with each channel assigned to I and Q, respectively.
6 The NI 5793 interpolates the data rate using Fractional Interpolation DSP blocks implemented in the LabVIEW FPGA target. See <resource here> for information about how to use Frequency Shift DSP blocks.