NI-5793 Specifications

NI-5793 Specifications

Definitions

Warranted specifications describe the performance of a model under stated operating conditions and are covered by the model warranty.

Characteristics describe values that are relevant to the use of the model under stated operating conditions but are not covered by the model warranty.

  • Typical specifications describe the performance met by a majority of models.
  • Nominal specifications describe an attribute that is based on design, conformance testing, or supplemental testing.

Specifications are Typical unless otherwise noted.

NI-5793 Pinout

Use the pinout to connect to terminals on the NI-5793.

Figure 1. NI-5793 Front Panel Connector Pinout


Signal Name Description
LO OUT Local oscillator output, +12 dBm maximum, +0 dBm
CLK IN Reference Clock input, 50 Ω single-ended, +20 dBm maximum
CLK OUT Exported clock output, DC-coupled, 0V to 2V
LO IN Local oscillator input, +20 dBm maximum
TX OUT Transmit channel, +20 dBm maximum
AUX I/O Digital I/O and PFI connector
Caution To avoid damaging the NI-5793, disconnect all connected signals before powering down. Connect signals after the adapter module powers on by the FlexRIO FPGA module or Controller for FlexRIO.
Caution Connections that exceed the maximum ratings of connectors on the NI-5793 might damage the device and the chassis. NI is not liable for any damage resulting from such connections.

AUX I/O Connector

Figure 1. AUX I/O Connector Pinout


Table 1. Signal Descriptions
Pin Signal Signal Description
1 DIO Port 0 (0) Bidirectional single-ended (SE) digital I/O (DIO) data channel.
2 GND Ground reference for signals.
3 DIO Port 0 (1) Bidirectional SE DIO data channel.
4 DIO Port 0 (2) Bidirectional SE DIO data channel.
5 GND Ground reference for signals.
6 DIO Port 0 (3) Bidirectional SE DIO data channel.
7 DIO Port 1 (0) Bidirectional SE DIO data channel.
8 GND Ground reference for signals.
9 DIO Port 1 (1) Bidirectional SE DIO data channel.
10 DIO Port 1 (2) Bidirectional SE DIO data channel.
11 GND Ground reference for signals.
12 DIO Port 1 (3) Bidirectional SE DIO data channel.
13 PFI 0 Bidirectional SE DIO data channel.
14 NC No connect.
15 PFI 1 Bidirectional SE DIO data channel.
16 PFI 2 Bidirectional SE DIO data channel.
17 GND Ground reference for signals.
18 +5 V +5 V power (10 mA maximum).
19 PFI 3 Bidirectional SE DIO data channel.
Caution The AUX I/O connector accepts a standard, third-party HDMI cable, but the AUX I/O port is not an HDMI interface. Do not connect the AUX I/O port on the NI-5793 to the HDMI port of another device. NI is not liable for any damage resulting from such signal connections.

TX OUT

Amplitude Characteristics

Power range

Output

Noise floor to +8 dBm, nominal

Output resolution

0.25 dB, nominal

Amplitude settling time

<0.5 dB within 1 ms, nominal

Absolute Amplitude Accuracy

Note All values are typical.
Note Absolute amplitude accuracy uses a correction coefficient in EEPROM to improve performance. The TX amplitude accuracy applies to the output power level from -12 dBm to -4 dBm.
Table 2. Transmit Absolute Amplitude Accuracy
Frequency Temperature 23 °C±5 °C (dB)
>200 MHz to 1 GHz 0.8
1 GHz to 2 GHz 1.3
2 GHz to 3 GHz 1.3
3 GHz to 4.4 GHz 1.8
Figure 1. TX Output Power


Noise Density

Note All values are typical.
Note Performance is measured with 0 dB of TX attenuation.
Frequency Temperature 23 °C±5 °C(dBm/Hz)
>200 MHz to 1 GHz -138
>1 GHz to 2 GHz -138
>2 GHz to 4.4 GHz -138

Output Voltage Standing Wave Ratio (VSWR)

<2.0 GHz

1.6:1

≥2.0 GHz and <3.0 GHz

1.4:1

≥3.0 GHz

1.7:1

Note The VSWR is measured with 10 dB of TX attenuation.

TX OUT Third Order Intermodulation (IP3)

Note All values are typical.
Note Values are based on two input tones spaced 1.3 MHz apart with 5 dB of TX attenuation.
Table 3. TX IP3
Frequency Temperature 23 °C ± 5 °C (dBm)
>200 MHz to 1 GHz 19
>1 GHz to 2 GHz 17
>2 GHz to 3 GHz 13
>3 GHz to 3.9 GHz 11
>3.9 GHz to 4.4 GHz 8

Second Order Intermodulation (IP2)

Note All values are typical.
Table 5. IP2
Frequency Temperature 23 °C ±5 °C (dBm)
>200 MHz to 1 GHz 25
>1 GHz to 2 GHz 25
>2 GHz to 3 GHz 25
>3 GHz to 4.4 GHz 35
Note Values are based on two input tones spaced 1.3 MHz MHz apart with 5 dB of TX attenuation.

TX Sideband Image Suppression

Note All values are nominal.
Table 5. Image Suppression
Frequency Temperature 23 °C ±5 °C (dBc)
>200 MHz to 1 GHz -50
>1 GHz to 2 GHz -50
>2 GHz to 3 GHz -50
>3 GHz to 4.4 GHz -45
Note The image suppression specifications hold at the center frequency of the transmitted instantaneous bandwidth after the device performs a recent single point I/Q impairment self-correction.

TX LO Residual Power

Note All values are typical.
Table 6. TX LO Residual Power
Frequency Temperature 23 °C ±5 °C (dBm)
>200 MHz to 1 GHz -48
>1 GHz to 2 GHz -48
>2 GHz to 3 GHz -48
>3 GHz to 4.4 GHz -45
Note This specification holds at the center frequency of the transmitted instantaneous bandwidth, 100 MHz maximum after the device performs a recent single point I/Q impairment self-correction. The measurement is performed with 0 dB of TX attenuation.

LO OUT Front Panel Connector

Frequency range

200 MHz to 4.4 GHz

Power

3 dBm, ±3 dB, nominal

Output power resolution

0.15 dB

Output impedance

50 Ω, nominal

Output VSWR

1.78:1

Amplitude settling time

< 0.25 dB in less than 10 ms, typical

Maximum DC voltage

±0.5 VDC

Figure 1. LO Output Power vs. LO Frequency


LO IN Front Panel Connector

Frequency range

200 MHz to 4.4 GHz

Input power

3 dBm ±3 dB, nominal

Input impedance

50 Ω

Input VSWR

1.78:1

Absolute maximum power

+15 dBm

Maximum DC power

±0.5 VDC

TX OUT Frequency Characteristics

Frequency range

200 MHz to 4.4 GHz

Instantaneous bandwidth (6 dB)

200 MHz[1]1 Instantaneous bandwidth is 200 MHz at 6 dB. Instantaneous bandwidth is 130 MHz at 3 dB.

Tuning resolution[2]2 Tuning resolution combines LO step size capability and frequency shift DSP implemented on the FPGA.

<250 kHz

LO step size[3]3 All LO step size specifications are assumed to be with fractional mode enabled and a 100 kHz LO step size.

Integer mode

4 MHz, 6 MHz, 12 MHz, 24 MHz

Fractional mode

100 kHz step size

Figure 1. TX OUT Frequency Response


Frequency Settling Time

Settling time[4]4 The settling time specification only includes frequency settling, and it excludes any residual amplitude settling that may occur as a result of large frequency changes. Driver and operating system timing can affect transition times. This specification reflects only hardware settling.

< 50 ms per 100 MHz step

Phase Noise

Note All values are nominal.
Table 7. Phase Noise at 2.4 GHz
Offset Frequency Loop Phase Noise (dBc/Hz)
1 kHz -85
10 kHz -95
100 kHz -97
1 MHz -100
10 MHz -110
Figure 1. Phase Noise


Baseband Characteristics

Digital-to-Analog Converters (DAC)[5]5 DACs are dual-channel components with each channel assigned to I and Q, respectively.

Part number

TI DAC 3482

Resolution

16 bits

Data rate

250 MS/s

I/Q data rate

1.84 kS/s to 250 MS/s[6]6 The NI 5793 interpolates the data rate using Fractional Interpolation DSP blocks implemented in the LabVIEW FPGA target. See <resource here> for information about how to use Frequency Shift DSP blocks.

CLK IN Front Panel Connector

Frequency

Reference Clock

10 MHz

Sample Clock

250 MHz

Amplitude

Square

0.7 Vpk-pk to 5.0 Vpk-pk into 50 Ω, typical

Sine

1.4 Vpk-pk to 5.0 Vpk-pk (1 VRMS to 3.5 VRMS) into 50 Ω, typical

Input impedance

50 Ω, nominal

Coupling

AC

CLK OUT Front Panel Connector

Interface standard

3.3 V LVCMOS

Interface logic

Maximum VOL

0.55 V

Minimum VOH

2.7 V

Maximum VOH

3.6 V

Output impedance

50 Ω ±20%

Coupling

DC

Iout (DC)

±32 mA

Dimensions and Weight

Dimensions

12.9 × 2.0 × 12.1 cm (5.1 × 0.8 × 4.7 in)

Weight

413 g (14.6 oz)

I/O

RX in, RX out, LO in, LO out, 10 MHz, 10 MHz out

Power

6 W, nominal, with one LO turned on

AUX I/O (Port 0 DIO <0..3>, Port 1 DIO <0..3>, and PFI <0..3>

Number of channels

12 bidirectional (8 DIO and 4 PFI)

Connector type

HDMI

Interface standard

3.3 V LVCMOS

Interface logic

Maximum VIL

0.8 V

Minimum VIH

2.0 V

Maximum VOL

0.4 V

Minimum VOH

2.7 V

Maximum VOH

3.6 V

Zout

50 Ω ± 20%

Iout (DC)

±2 mA

Pull-down resistor

150 kΩ

Recommended operating voltage

-0.3 V to 3.6 V

Overvoltage protection

±10 V

Maximum toggle frequency

6.6 MHz

+5 V maximum power

10 mA

+5 V voltage tolerance

4.2 V to 5 V

Environment

Maximum altitude

2,000 m (800 mbar) (at 25 °C ambient temperature)

Pollution Degree

2

Indoor use only.

Operating Environment

Ambient temperature range

0 °C to 55 °C

Relative humidity range

10% to 90%, noncondensing

Storage Environment

Ambient temperature range

-40 °C to 70 °C

Relative humidity range

5% to 95%, noncondensing

Shock and Vibration

Operating shock

30 g peak, half-sine, 11 ms pulse

Random vibration

Operating

5 Hz to 500 Hz, 0.3 g RMS

Nonoperating

5 Hz to 500 Hz, 2.4 g RMS

Compliance and Certifications

Safety Compliance Standards

This product is designed to meet the requirements of the following electrical equipment safety standards for measurement, control, and laboratory use:

  • IEC 61010-1, EN 61010-1
  • UL 61010-1, CSA C22.2 No. 61010-1
Note For safety certifications, refer to the product label or the Product Certifications and Declarations section.

Electromagnetic Compatibility

This product meets the requirements of the following EMC standards for electrical equipment for measurement, control, and laboratory use:
  • EN 61326-1 (IEC 61326-1): Class A emissions; Basic immunity
  • EN 55011 (CISPR 11): Group 1, Class A emissions
  • EN 55022 (CISPR 22): Class A emissions
  • EN 55024 (CISPR 24): Immunity
  • AS/NZS CISPR 11: Group 1, Class A emissions
  • AS/NZS CISPR 22: Class A emissions
  • FCC 47 CFR Part 15B: Class A emissions
  • ICES-001: Class A emissions
Note In the United States (per FCC 47 CFR), Class A equipment is intended for use in commercial, light-industrial, and heavy-industrial locations. In Europe, Canada, Australia, and New Zealand (per CISPR 11), Class A equipment is intended for use only in heavy-industrial locations.
Note Group 1 equipment (per CISPR 11) is any industrial, scientific, or medical equipment that does not intentionally generate radio frequency energy for the treatment of material or inspection/analysis purposes.
Note For EMC declarations, certifications, and additional information, refer to the Product Certifications and Declarations section.

Product Certifications and Declarations

Refer to the product Declaration of Conformity (DoC) for additional regulatory compliance information. To obtain product certifications and the DoC for NI products, visit ni.com/product-certifications, search by model number, and click the appropriate link.

Environmental Management

NI is committed to designing and manufacturing products in an environmentally responsible manner. NI recognizes that eliminating certain hazardous substances from our products is beneficial to the environment and to NI customers.

For additional environmental information, refer to the Engineering a Healthy Planet web page at ni.com/environment. This page contains the environmental regulations and directives with which NI complies, as well as other environmental information not included in this document.

EU and UK Customers
  • Waste Electrical and Electronic Equipment (WEEE)—At the end of the product life cycle, all NI products must be disposed of according to local laws and regulations. For more information about how to recycle NI products in your region, visit ni.com/environment/weee.
  • 电子信息产品污染控制管理办法(中国RoHS)
  • 中国RoHSNI符合中国电子信息产品中限制使用某些有害物质指令(RoHS)。关于NI中国RoHS合规性信息,请登录 ni.com/environment/rohs_china。(For information about China RoHS compliance, go to ni.com/environment/rohs_china.)
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    1 Instantaneous bandwidth is 200 MHz at 6 dB. Instantaneous bandwidth is 130 MHz at 3 dB.

    2 Tuning resolution combines LO step size capability and frequency shift DSP implemented on the FPGA.

    3 All LO step size specifications are assumed to be with fractional mode enabled and a 100 kHz LO step size.

    4 The settling time specification only includes frequency settling, and it excludes any residual amplitude settling that may occur as a result of large frequency changes. Driver and operating system timing can affect transition times. This specification reflects only hardware settling.

    5 DACs are dual-channel components with each channel assigned to I and Q, respectively.

    6 The NI 5793 interpolates the data rate using Fractional Interpolation DSP blocks implemented in the LabVIEW FPGA target. See <resource here> for information about how to use Frequency Shift DSP blocks.