Writing to DMA FIFOs from Host VIs

Complete the following steps to write to a DMA FIFO from a host VI.

1. Open a reference to an FPGA VI or bitfile.
   Note   The FPGA target, FPGA VI, and host VI must be in the same LabVIEW project if you want to open a reference to an FPGA VI. The host VI does not need to be in a project if you open a reference to a bitfile. If you open a reference to an FPGA VI, the project must include a DMA FIFO item under the FPGA target and the FPGA VI must include a FIFO Method Node configured with the Read method on the block diagram that reads the DMA FIFO item.
2. Add an Invoke Method function to the block diagram of the host VI in the data flow where you want the host VI to write to the DMA FIFO. Wire the FPGA VI Reference In input.
3. Click the Invoke Method function and select FIFO»Write from the shortcut menu, where FIFO is the name of the FIFO item in the project. Wire the inputs and outputs as needed. The Write method returns Empty Elements Remaining when the data is written or when the Timeout period ends.
4. Add the Close FPGA VI Reference function to the block diagram.
5. Wire the FPGA VI Reference Out output on the Invoke Node to the FPGA VI Reference In input on the Close FPGA VI Reference function.