High Throughput Rectangular To Polar

Specifies general information about this function.

• Fixed-Point Configuration—

  Specifies the encodings, word lengths, and integer word lengths of the input and output terminals of this function. The configurations you specify determine the value range of the terminals.

  • x Type—

    Specifies the fixed-point configuration of the x input terminal.

    If you wire a fixed-point data type to this terminal and that data type follows the rules for this terminal, LabVIEW dims this section and uses information from the wire.

    • Signed—Specifies that this terminal is signed.
    • Unsigned—Specifies that this terminal is unsigned.
    • Word length—Specifies the word length of this terminal. If the encoding is Signed, the maximum value is 64 bits. If the encoding is Unsigned, the maximum value is 63 bits.
    • Integer word length—Specifies the integer word length of this terminal. If the encoding is Signed, the maximum value is 2047 bits. If the encoding is Unsigned, the maximum value is 2046 bits.

      As you change the value of this control, LabVIEW might change the Integer word length of the other input terminal. These changes maintain the supported fixed-point configuration of the shared internal data type.

  • y Type—

    Specifies the fixed-point configuration of the y input terminal.

    If you wire a fixed-point data type to this terminal and that data type follows the rules for this terminal, LabVIEW dims this section and uses information from the wire.

    • Signed—Specifies that this terminal is signed.
    • Unsigned—Specifies that this terminal is unsigned.
    • Word length—Specifies the word length of this terminal. If the encoding is Signed, the maximum value is 64 bits. If the encoding is Unsigned, the maximum value is 63 bits.
    • Integer word length—Specifies the integer word length of this terminal. If the encoding is Signed, the maximum value is 2047 bits. If the encoding is Unsigned, the maximum value is 2046 bits.

      As you change the value of this control, LabVIEW might change the Integer word length of the other input terminal. These changes maintain the supported fixed-point configuration of the shared internal data type.

  • magnitude Type—

    Specifies the fixed-point configuration of the magnitude output terminal.

    • Signed—Specifies that this terminal is signed. magnitude always is positive or equal to 0, so LabVIEW sets the encoding to Unsigned and dims this option.
    • Unsigned—Specifies that this terminal is unsigned. magnitude always is positive or equal to 0, so LabVIEW sets the encoding to Unsigned and dims this option.
    • Word length—Specifies the word length of this terminal. LabVIEW dims this option and automatically determines the value based on the fixed-point configurations you specify in the x Type and y Type sections.
    • Integer word length—Specifies the integer word length of this terminal. LabVIEW dims this option and automatically determines the value based on the fixed-point configurations you specify in the x Type and y Type sections.
  • phase Type—

    Specifies the fixed-point configuration of the phase output terminal.

    • Signed—Specifies that this terminal is signed. phase can be either positive or negative, so LabVIEW sets the encoding to Signed and dims this option.
    • Unsigned—Specifies that this terminal is unsigned. phase can be either positive or negative, so LabVIEW sets the encoding to Signed and dims this option.
    • Word length—Specifies the word length of this terminal. The value must be between 4 and 64 bits.
    • Integer word length—Specifies the integer word length of this terminal. LabVIEW sets this value to 2 bits and dims this option.
  • Rounding mode—

    Specifies how this function rounds the output data if rounding is necessary. You can choose Truncate (default), Round Half-Up, or Round Half-Even. If rounding occurs, the option you choose might affect the amount of resources this function requires.

• Execution Mode—

  Specifies how this function executes.

  • Outside single-cycle Timed Loop—

    Configures this Express VI to execute outside a single-cycle Timed Loop.

    If you select this option and place this Express VI inside a single-cycle Timed Loop, the Code Generation Errors window reports an error when you compile the FPGA VI.

  • Inside single-cycle Timed Loop—

    Configures this Express VI to execute inside a single-cycle Timed Loop.

    If you select this option and place this Express VI outside a single-cycle Timed Loop, the Code Generation Errors window reports an error when you compile the FPGA VI.

  • Throughput—

    Specifies the minimum number of cycles between two successive values of valid input data. Entering a low value in this control results in a high throughput rate. The maximum value of Throughput depends on the Word length of the output terminal. This option is available only if you select Inside single-cycle Timed Loop.

    If you select Outside single-cycle Timed Loop, this function returns a valid result on every call to the function. Therefore, the Throughput control displays 1 call / sample. The Configuration Feedback indicator displays the number of clock cycles this function takes to return a valid result.

• Registers—

  Specifies whether to add internal registers for function inputs and/or outputs. These registers will be placed outside of any embedded resources, such as block multipliers or DSP48E slices. This section is available only if you select Inside single-cycle Timed Loop.

  Note Adding registers can reduce the length of the combinatorial path, which can prevent compilation errors that result from a long combinatorial path. However, adding registers also increases the latency of this function, which means this function takes additional clock cycles to return a valid result.
  • Register inputs—Adds internal registers after the inputs to this function. Selecting this option increases the latency of the function by one cycle.
  • Register outputs—Adds internal registers before the outputs of this function. Selecting this option increases the latency of the function by one cycle.

Specifies options for the COordinate Rotation DIgital Computer (CORDIC) algorithm this function uses.

• Precision—

  Specifies options about the precision of the result(s) this function returns.

  • Number of internal iterations—Specifies the number of cycles this function takes to return a valid result without considering input/output registers or any Gain compensation you select.
    • Adapt to configuration—Specifies whether LabVIEW automatically determines the number of internal iterations based on the options you specify on the General page. By default, this checkbox contains a checkmark.
    • Value—Specifies the number of cycles this function takes to return a valid result without considering input/output registers or any Gain compensation you select. By default, LabVIEW automatically determines this value and dims the control.

      To enable this control, remove the checkmark from the Adapt to configuration checkbox. Increasing the number of internal iterations increases both the precision of the result and the latency of this function.

  • Internal word length—Specifies the word length of internal calculations.
    • Adapt to configuration—Specifies whether LabVIEW automatically determines the value of the internal word length based on the options you specify on the General page and the Value of the Number of internal iterations. By default, this checkbox contains a checkmark.
    • Value—Specifies the word length of internal calculations. By default, LabVIEW dims this control and automatically determines this value based on the options you specify on the General page and the Value of the Number of internal iterations.

      To enable this control, remove the checkmark from the Adapt to configuration checkbox. Increasing the internal word length increases the precision of the output, the amount of FPGA resources this function requires, and the length of the combinatorial path.

• Gain Compensation—Specifies whether this function uses gain compensation before returning the output terminal values.
  • Yes—Specifies that this function returns the correct values. If you select this option, this function multiplies the internal results by the Gain reciprocal before returning these results to the output terminals.
  • No—Specifies that this function returns incorrect values. If you select this option, this function does not multiply the internal results by the Gain reciprocal before returning these results to the output terminals. In this situation, this function uses fewer FPGA resources than if you selected Yes.

    To correct the values, you must multiply the outputs of this function by the Gain reciprocal that LabVIEW displays on this page. Select this option to save FPGA resources and have more control over when this multiplication happens.

  • Gain reciprocal—Displays the value by which you must multiply the outputs of this function if you selected No gain compensation.

    If you selected Yes, this function performs this multiplication before returning the numeric results. In this situation, you do not need to use the Gain reciprocal value.

Displays information about how this function executes. This information is based on the configuration options you specify.

x —

Specifies the x value of the rectangular coordinates.

Note If you wire an unsigned value to this terminal that has a word length of 64 bits, LabVIEW coerces the word length to be 63 bits and displays a coercion dot on the wire.

y —

Specifies the y value of the rectangular coordinates.

Note If you wire an unsigned value to this terminal that has a word length of 64 bits, LabVIEW coerces the word length to be 63 bits and displays a coercion dot on the wire.

input valid —

Specifies whether the next data point has arrived for processing. Wire output valid of an upstream node to input valid to transfer data from the upstream node to this Express VI.

To display this handshaking terminal, select Inside single-cycle Timed Loop in the configuration dialog box.

ready for output —

Specifies whether downstream nodes are ready for this Express VI to return a new value. The default is TRUE. Use a Feedback Node to wire ready for input of a downstream node to ready for output of the current node.

Note If ready for output is FALSE during a given cycle, output valid returns FALSE during that cycle.

To display ready for output, select Inside single-cycle Timed Loop in the configuration dialog box.

magnitude —

Returns the magnitude.

phase (pi) —

Returns the phase in pi radians, which use fewer FPGA resources than radians. To convert this value into radians, multiply phase by pi.

output valid —

Returns TRUE if this Express VI has computed a result that downstream nodes can use. Use output valid for handshaking with other FPGA VIs and functions.

To display output valid, select Inside single-cycle Timed Loop in the configuration dialog box.

ready for input —

Returns TRUE if this Express VI is ready to accept new input data. Use a Feedback Node to wire ready for input to ready for output of an upstream node.

Note If ready for input returns FALSE during a given cycle, LabVIEW discards any data that other nodes send to this Express VI during the following cycle. LabVIEW discards this data even if input valid is TRUE during the following cycle.

To display ready for input, select Inside single-cycle Timed Loop in the configuration dialog box.