Clearing FPGA FIFOs

When you run the FPGA VI on a development computer with real I/O, LabVIEW clears FIFOs when the FPGA VI stops and then starts again. When you run the FPGA VI on an FPGA target using interactive front panel communication, LabVIEW does not clear FIFOs when the FPGA VI stops and then starts again. To clear target-scoped or VI-defined FIFOs on the FPGA, use the Clear method of the FIFO Method Node. You also can right-click the VI in the Project Explorer window and select Download from the shortcut menu to clear FIFOs.

When you control an FPGA VI using programmatic FPGA interface communication, use the Stop method of the Invoke Method function to clear individual DMA FIFOs from the host VI. You also can clear all FIFOs using the Reset method on the Invoke Method function or the Close FPGA VI Reference function with the Close and Reset if Last Reference shortcut menu option selected. In addition to clearing FIFOs, the Reset method and Close and Reset if Last Reference option complete other tasks.