Theory of Operation

DST is designed to allow you to test digital transmit-receive modules (digital TRM).

A digital TRM is a high-performance device that features the following:

  • Wide-bandwidth RF-sampling digital-to-analog (DAC), capable of generating one or more channels simultaneously
  • Wide-bandwidth RF-sampling analog-to-digital (ADC), capable of acquiring many channels simultaneously
  • Many high performance digital signal processing (DSP) functions applied to the stream of data coming to and from the ADCs and DACs
  • High-speed serial interface (SERDES) that allows you to transmit (TX) and receive (RX) data at high rate, synchronized by internal or external clocks and triggers
  • Control interface, configured using a specific digital protocol such as SPI or LVDS, to set up the device for different speeds, bit widths, and special digital signal processing within the device.
Figure 1. Digital TRM


Testing this DUT requires the following tasks:

  1. Setting up the digital TRM modes of operations and registers though the digital control interface (LVDS/SPI). You can use other NI devices that support LVDS or SPI to accomplish these tasks.
  2. Synchronizing and coordinating many systems to excite the DUT (through the Digital Signal Transceiver Driver).
  3. Using the high-speed serial interface to send and receive I/Q signals (through the Digital Signal Transceiver Driver).
  4. Generating RF test signals and acquiring many RF responses from the RF front end of the device. Use NI-RFmx capabilities with a vector signal transceiver (VST) for measurements or signal generation.
Figure 1. Digital TRM Test System


Digital Signal Transceiver Driver Host API

The DST instrument is a high-speed serial instrument configured to behave like a digital vector signal transceiver though a custom FPGA firmware. The FPGA firmware allows you to:

  • Receive data from the serial interface, buffer to the onboard memory, and then transfer the I/Q data to host
  • Transfer I/Q data from the host to the onboard memory and transmit to the serial interface using scripts to repeat or start and/or stop at specific events
  • Easily convert serial data stream into I/Q data with the option to apply digital signal processing (DSP) functions for improved performance and better control of the data stream for generation of test vectors and correction of measurement signals
Figure 1. DST Host API


The API has four main sections that helps you control different parts of the FPGA code:

  • Device Configuration (DST)—These functions are responsible for loading the firmware into the device, managing the session to the device and resources.
  • Generation (DSTG)—These functions configure the firmware to stream data to the high-speed serial in many different forms. In general, you can download I/Q waveforms to the DRAM of the device and then repeat according to a script, with a similar functionality to NI-RFSG. Refer to Generating an I/Q Waveform for more information.
  • Acquisition (DSTA)—These functions configure the firmware to receive the stream of data from the high-speed serial interface and process that stream to transfer the I/Q data to the host. This process also allows you to change some features in the firmware, allowing you to get the specific data you are looking for. Refer to Acquiring an I/Q Waveform for more information.
  • Serial Interface—These functions call into a plug-in interface where you can control or change the configuration to the serial interface hardware, allowing you to change the protocol or customize your own serial interface. Refer to High-Speed Serial Communication and Interface for more information.
  • Figure 1. High-Speed Serial Interface


    High-Speed Serial Communication and Interface

    One of the important features of the Digital Signal Transceiver Driver is its capacity to change the serial protocol used to communicate with a digital TRM. The serial instrument uses a high-performance Xilinx FPGA, and you can incorporate your own protocol for communicating with the device under test (DUT).

    To simplify the integration process, NI includes protocols already integrated in LabVIEW to facilitate your development. The following is a list of protocols available for this version of DST, but distributed by other packages:

  • JESD204B/C—This protocol is used to communicate with ADCs and DACs directly through many lanes and at high-speed transmission frequencies.
  • However, independent of the protocol used, you can use the existing DST API by developing a plug-in interface for high-speed serial. This interface helps you reuse most of the existing offering without changing much of the existing test system. NI provides a bitfile and package file example for you to use for loopback cabling. These files are located at <Program Files>\National Instruments\NI-DST\Firmware\JESD204.

    Note Contact NI for more information about implementing JESD204B/C or any other protocol.

    Onboard Digital Signal Processing

    The Digital Signal Transceiver Driver firmware features digital signal processing (DSP), which allows you to change I/Q signal properties to generate or acquire more consolidated data and make testing easier. You can apply DSP functions to generation or acquisition independently.

    DSP features include:

  • Digital Gain—Scales the amplitude of the streaming I and Q signals independently. Use this function to control the maximum power of the signal transmitted to the device or to reduce the power to avoid clipping when measuring the signal.

    data out.I = Quantization (data in.I * GI)

    data out.Q = Quantization (data in.Q * GQ)

    Where:

    • GI is 10**(IGaindB/20) applied to the I signal
    • GQ is 10**(QGaindB/20) applied to the Q signal

    This allows you to change the I and Q gains.

  • Digital Offset—Shifts the bias signal of the streaming I/Q signal. Use this function to remove bias or offset voltages from I(t) and Q(t) signals.

    data out.I = Quantization (data in.I + CI)

    data out.Q = Quantization (data in.Q + CQ)

    Where CI and CQ are the offset value applied to the I and Q signal at the same time, respectively.

    This value allows you to change the I and Q offsets.

  • Digital Frequency Shift—Moves the center frequency and phase of the streaming signal. It is implemented by applying a numerically controlled oscillator (NCO) that creates a cosine/sine pair, which is then multiplied by the I/Q data using a complex multiplier. The net effect shifts the complex spectrum to the left or right in the frequency domain.

    data out.I = data in.I * cosine (2*pi*DeltaF) - data in.Q * sine (2*pi*DeltaF)

    data out.Q = data in.I * sine (2*pi*DeltaF)+ data in.Q * cosine (2*pi*DeltaF)

    Where DeltaF is the frequency shift applied to the signal and has the ratio of the DeltaF and data rate between -0.5 and 0.5. When using this function from the host API, you must consider the frequency shift in Hertz—within ±50% of the sampling rate in S/s—to apply to the signal.

    You can also use this function to change the phase of the signal by -180° and 180°.

  • Resample—Interpolates or decimates the streaming signal to allow you to increase or decrease its sampling rate, keeping the same I/Q signal features—frequency, phase, and amplitude. The rate between the maximum input or output frequency and the I/Q sample rate defines the interpolation/decimation factor.