Digital Signal Transceiver Generation (DSTG) State Model
- Updated2024-08-15
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Digital Signal Transceiver Generation (DSTG) State Model
The Digital Signal Transceiver Generation (DSTG) programming model for vector signal generators and the generation functionality of vector signal transceivers has three main states. The state of the instrument at a given time affects the actions you can take during that time.
The following diagram depicts the state model for the DST instrument when programmed with DSTG software.
The states are as follows:
- Verifies the settings of all properties.
- Validates the specified configuration.
- Writes all settings to the hardware modules.
- Transitions to the Committed state.
If any properties are changed while in the Committed state, the session implicitly transitions back to the Configuration state and the hardware configuration reflects the previously committed properties or attributes.