This document contains the LabVIEW 2020 FPGA Module known issues that were discovered before and since the release of LabVIEW 2020 FPGA Module. Known issues are performance issues or technical bugs that NI has acknowledged exist within this version of the product.
Not every issue known to NI appears on this list; it is intended to show the most severe and common issues that you may encounter and provide workarounds when possible. Other technical issues that you may encounter could occur through normal product use or system compatibility issues. You may find more information on these issues in NI’s Product Documentation, Knowledgebase, or Community.
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Bug Number |
Legacy ID |
Description |
Details |
|---|---|---|---|
| 225286 | 713545 |
Changing the bitfile contents on disk while a VI with a reference to that bitfile is open does not force the new bitfile to be loadedNew bitfile contents do not load and subsequently run after changing bitfile contents (i.e. deleting an old bitfile and renaming another bitfile to use the original bitfile's name) while running a VI containing an Open FPGA VI Reference node that points to that bitfile.
Workaround: Browse to the bitfile through the Configure Open FPGA VI Reference dialog and select the bitfile again. The node creates a memory copy of the bitfile contents which introduces the possibility of an inconsistency between the bitfile contents on disk and the in-memory copy. The workaround forces an update to the in-memory copy.
|
Reported Version: LabVIEW FPGA Module 2015 SP1 64-bit Resolved Version: N/A Added: May 16, 2019 |
| 225298 | 708799 |
Moving a VI from the Host to FPGA that contains a variable sized array connected to a channel wire causes a Code Generation errorMoving and then attempting to compile a VI created on the host to an FPGA target when that VI contains a variable sized array connected to a channel writer endpoint causes a Code Generation error stating "LabVIEW cannot determine the size of the array on the control or indicator because arrays of different sizes are wired to separate calls to the non-reentrant VI. Ensure that all calls to the VI use array inputs of the same size." In addition, creating a variable sized array in an FPGA VI and then using that with a Channel Wire also causes the same Code Generation error to be thrown.
Workaround: Remove and then recreate the channel writer endpoint, channel reader endpoint, and array constants when the VI is under an FPGA target.
|
Reported Version: LabVIEW FPGA Module 2018 Resolved Version: N/A Added: May 16, 2019 |
Issues found in this section will not be listed in future known issues documents for this product.
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